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authorJonathan A. Kollasch <jakllsch@kollasch.net>2011-08-01 14:15:28 -0500
committerPeter Stuge <peter@stuge.se>2011-08-03 17:56:42 +0200
commitc2ffc6739cd94d996e8c11669031c101455eab90 (patch)
tree0e6cb1c2664937ffeffc83a7b1565191173d5965
parentce37765772ebe0e58d3da81a35131d23e9f05137 (diff)
downloadcoreboot-c2ffc6739cd94d996e8c11669031c101455eab90.tar.xz
Use preferred style of fixed-width integer types
Change-Id: I1abaaa2af4de940584039f9b8c348bb57fb611e0 Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net> Reviewed-on: http://review.coreboot.org/125 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Peter Stuge <peter@stuge.se>
-rw-r--r--src/mainboard/msi/ms7135/mptable.c2
-rw-r--r--src/mainboard/msi/ms7135/romstage.c6
2 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/msi/ms7135/mptable.c b/src/mainboard/msi/ms7135/mptable.c
index fc1caa5c67..341214539d 100644
--- a/src/mainboard/msi/ms7135/mptable.c
+++ b/src/mainboard/msi/ms7135/mptable.c
@@ -52,7 +52,7 @@ static void *smp_write_config_table(void *v)
{
device_t dev;
struct resource *res;
- uint32_t dword;
+ u32 dword;
dev = dev_find_slot(bus_ck804[0], PCI_DEVFN(sbdn + 0x1, 0));
if (dev) {
diff --git a/src/mainboard/msi/ms7135/romstage.c b/src/mainboard/msi/ms7135/romstage.c
index 8609142f18..5feef79625 100644
--- a/src/mainboard/msi/ms7135/romstage.c
+++ b/src/mainboard/msi/ms7135/romstage.c
@@ -68,8 +68,8 @@ static inline int spd_read_byte(unsigned device, unsigned address)
static void sio_setup(void)
{
- uint32_t dword;
- uint8_t byte;
+ u32 dword;
+ u8 byte;
/* Subject decoding */
byte = pci_read_config8(PCI_DEV(0, CK804_DEVN_BASE + 1, 0), 0x7b);
@@ -85,7 +85,7 @@ static void sio_setup(void)
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
- static const uint16_t spd_addr[] = {
+ static const u16 spd_addr[] = {
DIMM0, DIMM1, 0, 0,
0, 0, 0, 0,
0, 0, 0, 0,