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authorEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-12-06 05:07:33 +1100
committerEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-12-06 03:25:52 +0100
commitc5c21d3fe114063887653a91920dcc3a7c6a436a (patch)
tree63ca074747bc05d181f656fe9c9a9b82eb2e7cbe
parent14ca52bb964794fe4251d8848a6cefe12682cce4 (diff)
downloadcoreboot-c5c21d3fe114063887653a91920dcc3a7c6a436a.tar.xz
mainboard/lenovo/g505s/buildOpts.c: Trivial variable rename
Minor fix to avoid confusion, nothing to see here. Change-Id: I89d56a91d2df049e85cf49c23218620caba84880 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/7654 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
-rw-r--r--src/mainboard/lenovo/g505s/buildOpts.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/lenovo/g505s/buildOpts.c b/src/mainboard/lenovo/g505s/buildOpts.c
index 56de36e8a7..6d32fe858f 100644
--- a/src/mainboard/lenovo/g505s/buildOpts.c
+++ b/src/mainboard/lenovo/g505s/buildOpts.c
@@ -385,7 +385,7 @@ GPIO_CONTROL lenovo_g505s_gpio[] = {
#define SCI_MAP_XHCI_10_0 0x78
#define SCI_MAP_PWRBTN 0x73
-SCI_MAP_CONTROL m6_1035dx_sci_map[] = {
+SCI_MAP_CONTROL lenovo_g505s_sci_map[] = {
{GEVENT_PIN( EC_SCI_GEVENT ), EC_SCI_GPE},
{GEVENT_PIN( EC_LID_GEVENT ), EC_LID_GPE},
{GEVENT_PIN( PCIE_GEVENT ), PCIE_GPE},
@@ -394,7 +394,7 @@ SCI_MAP_CONTROL m6_1035dx_sci_map[] = {
{SCI_MAP_XHCI_10_0, PME_GPE},
{SCI_MAP_PWRBTN, PME_GPE},
};
-#define BLDCFG_FCH_SCI_MAP_LIST (&m6_1035dx_sci_map[0])
+#define BLDCFG_FCH_SCI_MAP_LIST (&lenovo_g505s_sci_map[0])
// The following definitions specify the default values for various parameters in which there are
// no clearly defined defaults to be used in the common file. The values below are based on product