diff options
| author | Martin Roth <martin.roth@se-eng.com> | 2014-12-17 09:56:32 -0700 |
|---|---|---|
| committer | Martin Roth <gaumless@gmail.com> | 2014-12-19 03:12:40 +0100 |
| commit | c9be93fefeb20a1839f74936a08c3a04d1f7fd32 (patch) | |
| tree | 2916e3e2b1d97ad3290a04857f83efdb82f0a52b | |
| parent | 002178a34d57e907a2744d6f702c6956f156cebc (diff) | |
| download | coreboot-c9be93fefeb20a1839f74936a08c3a04d1f7fd32.tar.xz | |
fsp_baytrail: Remove GPIO_NC1 #define
The GPIO_NC1 #define was added to handle GPIOs that are not on func0.
This is already handled elsewhere in the GPIO code, so is not needed.
- Remove the single GPIO_NC1 from platforms using fsp_baytrail
- Revert the GPIO_INPUT_PU_10k #define to remove the _func argument.
Update everywhere this macro is called.
- Remove GPIO_NC1
Change-Id: I32f337af7bc88eab821d9a8c375145b45718275f
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/7849
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
| -rw-r--r-- | src/mainboard/intel/minnowmax/gpio.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/fsp_baytrail/baytrail/gpio.h | 9 |
2 files changed, 5 insertions, 6 deletions
diff --git a/src/mainboard/intel/minnowmax/gpio.c b/src/mainboard/intel/minnowmax/gpio.c index defaf17bbf..66e85da3dc 100644 --- a/src/mainboard/intel/minnowmax/gpio.c +++ b/src/mainboard/intel/minnowmax/gpio.c @@ -191,7 +191,7 @@ static const struct soc_gpio_map gpssus_gpio_map[] = { GPIO_FUNC1, /* GPIO_S5[14] - GPIO_S514_J20 */ GPIO_FUNC0, /* GPIO_S5[15] - PMC_PCIE_WAKE_R */ GPIO_FUNC0, /* GPIO_S5[16] - PMC_PWRBTN */ - GPIO_NC1, /* GPIO_S5[17] - No Connect */ + GPIO_NC, /* GPIO_S5[17] - No Connect */ GPIO_FUNC1, /* GPIO_S5[18] - LPCPD_L (TP7) */ GPIO_FUNC0, /* GPIO_S5[19] - SOC_USB_HOST_OC0 */ GPIO_FUNC0, /* GPIO_S5[20] - SOC_USB_HOST_OC1 */ diff --git a/src/soc/intel/fsp_baytrail/baytrail/gpio.h b/src/soc/intel/fsp_baytrail/baytrail/gpio.h index 325eeaab41..600f4e97f4 100644 --- a/src/soc/intel/fsp_baytrail/baytrail/gpio.h +++ b/src/soc/intel/fsp_baytrail/baytrail/gpio.h @@ -156,8 +156,8 @@ #define PAD_VAL_DEFAULT PAD_VAL_INPUT /* Configure GPIOs as MMIO by default */ -#define GPIO_INPUT_PU_10K(_func) \ - { .pad_conf0 = PAD_FUNC##_func | PAD_PU_10K | PAD_PULL_UP | PAD_CONFIG0_DEFAULT, \ +#define GPIO_INPUT_PU_10K \ + { .pad_conf0 = PAD_PU_10K | PAD_PULL_UP | PAD_CONFIG0_DEFAULT, \ .pad_conf1 = PAD_CONFIG1_DEFAULT, \ .pad_val = PAD_VAL_INPUT, \ .use_sel = GPIO_USE_MMIO, \ @@ -265,10 +265,9 @@ /* Common default GPIO settings */ #define GPIO_INPUT GPIO_INPUT_NOPU #define GPIO_INPUT_LEGACY GPIO_INPUT_LEGACY_NOPU -#define GPIO_INPUT_PU GPIO_INPUT_PU_10K(0) +#define GPIO_INPUT_PU GPIO_INPUT_PU_10K #define GPIO_INPUT_PD GPIO_INPUT_PD_10K -#define GPIO_NC GPIO_INPUT_PU_10K(0) -#define GPIO_NC1 GPIO_INPUT_PU_10K(1) +#define GPIO_NC GPIO_INPUT_PU_10K #define GPIO_DEFAULT GPIO_FUNC0 /* 16 DirectIRQs per supported bank */ |