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authorPeter Stuge <peter@stuge.se>2009-02-09 20:26:14 +0000
committerPeter Stuge <peter@stuge.se>2009-02-09 20:26:14 +0000
commitcd7e9b55dd9887047555e99ec926a1cf762f52de (patch)
treed9bee2d4736fc455f3b786f738446f6f12434e9c
parentc4ddbff70621449606fa3f0a1ad8277fac0f5aeb (diff)
downloadcoreboot-cd7e9b55dd9887047555e99ec926a1cf762f52de.tar.xz
flashrom: Fix broken flash chip base address logic
Elan SC520 requries us to deal with flash chip base addresses at locations other than top of 4GB. The logic for that was incorrectly triggered also when a board had more than one flash chip. This patch will honor flashbase only when probing for the first flash chip on the board, and look at top of 4GB for later chips. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3932 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r--util/flashrom/flashrom.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/util/flashrom/flashrom.c b/util/flashrom/flashrom.c
index e19f7f2ff8..a47bfa0754 100644
--- a/util/flashrom/flashrom.c
+++ b/util/flashrom/flashrom.c
@@ -121,7 +121,7 @@ struct flashchip *probe_flash(struct flashchip *first_flash, int force)
size = getpagesize();
}
- base = flashbase ? flashbase : (0xffffffff - size + 1);
+ base = flashbase && flashchips == first_flash ? flashbase : (0xffffffff - size + 1);
flash->virtual_memory = bios = physmap("flash chip", base, size);
if (force)