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authorSiyuan Wang <wangsiyuanbuaa@gmail.com>2013-06-05 14:32:51 +0800
committerStefan Reinauer <stefan.reinauer@coreboot.org>2013-06-13 01:15:35 +0200
commitd2ae6ae7898b00425ace91ebb835299c18a5ad50 (patch)
tree1ba53738ec439780dc63e9855dc532a9f533e9fb
parent59d0d159f4710779043e34618a20dccff2af51dd (diff)
downloadcoreboot-d2ae6ae7898b00425ace91ebb835299c18a5ad50.tar.xz
AMD Thatcher: fix issue 'S3 fails to suspend after wake up from USB keyboard'
This issue can be reproduced in Linux by the following steps: 1) use pm-suspend to suspend. 2) use USB keyboard to wake up. 3) use pm-suspend to suspend. FAIL To SUSPEND. The cause of this issue is: USB devices use bit 11(0x0b) of GP0_STS represents S3 wake up event, but this bit is not clear after wake up. So OS thinks there is a wake up signal and wake up immediately. In this patch, I add AcpiGpe0Blk using MMIO access and write 1 on bit 11. Write 1 to clear as spec says. I have tested on Thatcher The same change was done for AMD Parmer in commit »AMD Parmer: fix issue 'S3 fails to suspend after wake up from USB keyboard' (03901124) [1]. [1] http://review.coreboot.org/#/c/3347/ (Change-Id: Iec3078bf29de99683e7cd3ef4e178fbeb4dc09c1) Change-Id: Iaef39237497ef896d0f186e8f5522222c0ce6cb7 Signed-off-by: Siyuan Wang <SiYuan.Wang@amd.com> Signed-off-by: Siyuan Wang <wangsiyuanbuaa@gmail.com> Reviewed-on: http://review.coreboot.org/3374 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
-rw-r--r--src/mainboard/amd/thatcher/dsdt.asl10
1 files changed, 10 insertions, 0 deletions
diff --git a/src/mainboard/amd/thatcher/dsdt.asl b/src/mainboard/amd/thatcher/dsdt.asl
index 7f08bbb350..e48c9cf0a6 100644
--- a/src/mainboard/amd/thatcher/dsdt.asl
+++ b/src/mainboard/amd/thatcher/dsdt.asl
@@ -202,6 +202,14 @@ DefinitionBlock (
/* PM1 Event Block
* First word is PM1_Status, Second word is PM1_Enable
*/
+
+ /* AcpiGpe0Blk */
+ OperationRegion(GP0B, SystemMemory, 0xfed80814, 0x04)
+ Field(GP0B, ByteAcc, NoLock, Preserve) {
+ , 11,
+ USBS, 1,
+ }
+
Scope(\_SB) {
/* PCIe Configuration Space for CONFIG_MMCONF_BUS_NUMBER busses */
OperationRegion(PCFG, SystemMemory, PCBA, PCLN)
@@ -844,6 +852,8 @@ DefinitionBlock (
* Store(Arg0, Index(WKST,1))
* }
*/
+ /* clear USB wake up signal */
+ Store(1, USBS)
Return(WKST)
} /* End Method(\_WAK) */