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authorLee Leahy <leroy.p.leahy@intel.com>2016-05-31 18:12:53 -0700
committerLeroy P Leahy <leroy.p.leahy@intel.com>2016-06-02 17:15:41 +0200
commitd52f2580e7b4b735d725d7d1e5a11a5ba93ced5c (patch)
treec989cdfdcb9a1bf471245361ea13bce68e8c1613
parentc5b758bec803957455a460503547c5846917ae08 (diff)
downloadcoreboot-d52f2580e7b4b735d725d7d1e5a11a5ba93ced5c.tar.xz
drivers/intel/fsp1_1: Update weak MRC cache routines
Update the weak functions for the MRC cache. TEST=Build and run on Galileo Gen2 Change-Id: I54a1252cfff1a2f68b163f0feb65e2bceb37f6a9 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/15042 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
-rw-r--r--src/drivers/intel/fsp1_1/romstage.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/src/drivers/intel/fsp1_1/romstage.c b/src/drivers/intel/fsp1_1/romstage.c
index c035f606f7..6584c55b31 100644
--- a/src/drivers/intel/fsp1_1/romstage.c
+++ b/src/drivers/intel/fsp1_1/romstage.c
@@ -364,15 +364,16 @@ __attribute__((weak)) void mainboard_add_dimm_info(
}
/* Get the memory configuration data */
-__attribute__((weak)) int mrc_cache_get_current(
- const struct mrc_saved_data **cache)
+__attribute__((weak)) int mrc_cache_get_current_with_version(
+ const struct mrc_saved_data **cache, uint32_t version)
{
printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
return -1;
}
/* Save the memory configuration data */
-__attribute__((weak)) int mrc_cache_stash_data(const void *data, size_t size)
+__attribute__((weak)) int mrc_cache_stash_data_with_version(const void *data,
+ size_t size, uint32_t version)
{
printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
return -1;