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authorJonathan Kollasch <jakllsch@kollasch.net>2011-03-03 23:09:43 +0000
committerJonathan A. Kollasch <jakllsch@kollasch.net>2011-03-03 23:09:43 +0000
commitd5782f3588f402124a2659e9027f249a8eceb7c2 (patch)
tree7f902aa6d93901e843ebc47fda9abff97ddd3992
parentfadb0043593dcee6f8b4d3a820894b2aca67bd80 (diff)
downloadcoreboot-d5782f3588f402124a2659e9027f249a8eceb7c2.tar.xz
Correct off-by-one problem in AMD pre-rev-F model-F PowerNow code.
With this change the last P-state entry of the last CPU in the table is successfully conveyed into the SSDT. Signed-off-by: Jonathan Kollasch <jakllsch@kollasch.net> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6430 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r--src/cpu/amd/model_fxx/powernow_acpi.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/amd/model_fxx/powernow_acpi.c b/src/cpu/amd/model_fxx/powernow_acpi.c
index 09f6ae56d7..023292b96a 100644
--- a/src/cpu/amd/model_fxx/powernow_acpi.c
+++ b/src/cpu/amd/model_fxx/powernow_acpi.c
@@ -622,7 +622,7 @@ static int pstates_algorithm(u32 pcontrol_blk, u8 plen, u8 onlyBSP)
Pstate_vid[Pstate_num] = vid_to_reg(data->pstates[Pstate_num - 1].voltage);
Pstate_power[Pstate_num] = data->pstates[Pstate_num - 1].tdp * 100;
Pstate_num++;
- } while ((Pstate_num < MAXP) && (data->pstates[Pstate_num].freqMhz != 0));
+ } while ((Pstate_num < MAXP) && (data->pstates[Pstate_num - 1].freqMhz != 0));
for (i=0;i<Pstate_num;i++)
printk(BIOS_DEBUG, "P#%d freq %d [MHz] voltage %d [mV] TDP %d [mW]\n", i,