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authorKane Chen <kane.chen@intel.com>2014-05-20 13:06:40 +0800
committerMarc Jones <marc.jones@se-eng.com>2014-12-31 05:28:45 +0100
commitd816a0251ece04f87ca9c5d4fa916583c7fee86d (patch)
treec184940b41b53ce71a044d401737b112fe3b2cd5
parenta859aa3df5c56f7d0d2d0969c4de601b93e4c101 (diff)
downloadcoreboot-d816a0251ece04f87ca9c5d4fa916583c7fee86d.tar.xz
baytrail: add more gpio init macros
GPIO init marcos are not enough to initialize different gpio attributes BUG=none TEST=emerge-rambi coreboot works well Original-Change-Id: I193fa7b3e22632cacb555e726e3dd3991f4f4faa Original-Signed-off-by: Kane Chen <kane.chen@intel.com> Original-Reviewed-on: https://chromium-review.googlesource.com/200531 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> (cherry picked from commit 5e0fcbcd7cefcfccb5b565003336d197bb29e4cc) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I6bf4db9397733a003dfdedc6eb63b82127917851 Reviewed-on: http://review.coreboot.org/7953 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
-rw-r--r--src/soc/intel/baytrail/baytrail/gpio.h41
1 files changed, 41 insertions, 0 deletions
diff --git a/src/soc/intel/baytrail/baytrail/gpio.h b/src/soc/intel/baytrail/baytrail/gpio.h
index 741f3e9de4..5071b09b79 100644
--- a/src/soc/intel/baytrail/baytrail/gpio.h
+++ b/src/soc/intel/baytrail/baytrail/gpio.h
@@ -206,6 +206,47 @@
.pad_conf1 = PAD_CONFIG1_DEFAULT, \
.pad_val = PAD_VAL_INPUT, }
+/* Direct / dedicated IRQ input - pass signal directly to apic */
+#define GPIO_DIRQ_LEVELHIGH_NO_PULL \
+ { .pad_conf0 = PAD_PULL_DISABLE | PAD_CONFIG0_DEFAULT \
+ | PAD_FUNC0 | PAD_IRQ_EN | PAD_TPE_IRQ | PAD_LEVEL_IRQ, \
+ .pad_conf1 = PAD_CONFIG1_DEFAULT, \
+ .pad_val = PAD_VAL_INPUT, }
+
+/* Direct / dedicated IRQ input - pass signal directly to apic */
+#define GPIO_DIRQ_LEVELLOW_PU_20K \
+ { .pad_conf0 = PAD_PU_20K | PAD_PULL_UP | PAD_CONFIG0_DEFAULT \
+ | PAD_FUNC0 | PAD_IRQ_EN | PAD_TNE_IRQ | PAD_LEVEL_IRQ, \
+ .pad_conf1 = PAD_CONFIG1_DEFAULT, \
+ .pad_val = PAD_VAL_INPUT, }
+
+/* Direct / dedicated IRQ input - pass signal directly to apic */
+#define GPIO_DIRQ_EDGELOW_PU_20K \
+ { .pad_conf0 = PAD_PU_20K | PAD_PULL_UP | PAD_CONFIG0_DEFAULT \
+ | PAD_FUNC0 | PAD_IRQ_EN | PAD_TNE_IRQ | PAD_EDGE_IRQ, \
+ .pad_conf1 = PAD_CONFIG1_DEFAULT, \
+ .pad_val = PAD_VAL_INPUT, }
+
+/* Direct / dedicated IRQ input - pass signal directly to apic */
+#define GPIO_DIRQ_EDGEHIGH_PD_20K \
+ { .pad_conf0 = PAD_PU_20K | PAD_PULL_DOWN | PAD_CONFIG0_DEFAULT \
+ | PAD_FUNC0 | PAD_IRQ_EN | PAD_TPE_IRQ | PAD_EDGE_IRQ, \
+ .pad_conf1 = PAD_CONFIG1_DEFAULT, \
+ .pad_val = PAD_VAL_INPUT, }
+
+/* Direct / dedicated IRQ input - pass signal directly to apic */
+#define GPIO_DIRQ_EDGELOW_PD_20K \
+ { .pad_conf0 = PAD_PU_20K | PAD_PULL_DOWN | PAD_CONFIG0_DEFAULT \
+ | PAD_FUNC0 | PAD_IRQ_EN | PAD_TNE_IRQ | PAD_EDGE_IRQ, \
+ .pad_conf1 = PAD_CONFIG1_DEFAULT, \
+ .pad_val = PAD_VAL_INPUT, }
+
+/* Direct / dedicated IRQ input - pass signal directly to apic */
+#define GPIO_DIRQ_EDGEBOTH_PU_20K \
+ { .pad_conf0 = PAD_PU_20K | PAD_PULL_UP | PAD_CONFIG0_DEFAULT \
+ | PAD_FUNC0 | PAD_IRQ_EN | PAD_TPE_IRQ| PAD_TNE_IRQ | PAD_EDGE_IRQ, \
+ .pad_conf1 = PAD_CONFIG1_DEFAULT, \
+ .pad_val = PAD_VAL_INPUT, }
#define GPIO_OUT_LOW \
{ .pad_conf0 = PAD_PULL_DISABLE | PAD_CONFIG0_DEFAULT, \