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authorJonathan McDowell <noodles@earth.li>2005-08-08 08:16:23 +0000
committerJonathan McDowell <noodles@earth.li>2005-08-08 08:16:23 +0000
commitdc2454eb944c2ea9201bd650d7bc9942d4653a6c (patch)
tree43be72a4df1429321c87e3c65c372e8ab1d45347
parent1950783e00ab866ea2c8d2eba7527cab7ec57747 (diff)
downloadcoreboot-dc2454eb944c2ea9201bd650d7bc9942d4653a6c.tar.xz
Clean up vt1211 SuperIO support and make the EPIA-M config use it.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2003 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r--src/mainboard/via/epia-m/Config.lb30
-rw-r--r--src/superio/via/vt1211/chip.h15
-rw-r--r--src/superio/via/vt1211/vt1211.c172
-rw-r--r--src/superio/via/vt1211/vt1211.h14
4 files changed, 136 insertions, 95 deletions
diff --git a/src/mainboard/via/epia-m/Config.lb b/src/mainboard/via/epia-m/Config.lb
index ed17589ae0..decbd0e3b1 100644
--- a/src/mainboard/via/epia-m/Config.lb
+++ b/src/mainboard/via/epia-m/Config.lb
@@ -145,6 +145,30 @@ chip northbridge/via/vt8623
device pci 10.3 on end # USB 2
device pci 11.0 on # Southbridge
+ chip superio/via/vt1211
+ device pnp 2e.0 on # Floppy
+ io 0x60 = 0x3f0
+ irq 0x70 = 6
+ drq 0x74 = 2
+ end
+ device pnp 2e.1 off # Parallel Port
+ io 0x60 = 0x378
+ irq 0x70 = 7
+ drq 0x74 = 3
+ end
+ device pnp 2e.2 on # COM1
+ io 0x60 = 0x3f8
+ irq 0x70 = 4
+ end
+ device pnp 2e.3 on # COM2
+ io 0x60 = 0x2f8
+ irq 0x70 = 3
+ end
+ device pnp 2e.b on # HWM
+ io 0x60 = 0xec00
+ end
+
+ end
end
device pci 11.1 on end # IDE
@@ -153,12 +177,6 @@ chip northbridge/via/vt8623
device pci 11.6 off end # AC97 Modem
device pci 12.0 on end # Ethernet
end
- chip superio/via/vt1211
- register "enable_com_ports" = "1"
- register "enable_hwmon" = "1"
- register "enable_lpt" = "1"
- register "enable_fdc" = "1"
- end
# This is on the EPIA MII, not the M.
# chip southbridge/ricoh/rl5c476
# end
diff --git a/src/superio/via/vt1211/chip.h b/src/superio/via/vt1211/chip.h
index fc461cc635..cfe0a31905 100644
--- a/src/superio/via/vt1211/chip.h
+++ b/src/superio/via/vt1211/chip.h
@@ -1,19 +1,12 @@
#ifndef _SUPERIO_VIA_VT1211
#define _SUPERIO_VIA_VT1211
-extern struct chip_operations superio_via_vt1211_control;
+#include <uart8250.h>
+
+extern struct chip_operations superio_via_vt1211_ops;
struct superio_via_vt1211_config {
- /* PCI function enables */
- /* i.e. so that pci scan bus will find them. */
- /* I am putting in IDE as an example but obviously this needs
- * to be more complete!
- */
- /* enables of functions of devices */
- int enable_com_ports;
- int enable_fdc;
- int enable_lpt;
- int enable_hwmon;
+ struct uart8250 com1, com2;
};
#endif /* _SUPERIO_VIA_VT1211 */
diff --git a/src/superio/via/vt1211/vt1211.c b/src/superio/via/vt1211/vt1211.c
index c537429fcd..f51aacdbf9 100644
--- a/src/superio/via/vt1211/vt1211.c
+++ b/src/superio/via/vt1211/vt1211.c
@@ -22,11 +22,11 @@
#include <arch/io.h>
-#include <device/device.h>
-#include <device/pci.h>
-#include <device/pci_ops.h>
-#include <device/pci_ids.h>
#include <console/console.h>
+#include <device/device.h>
+#include <device/pnp.h>
+#include <uart8250.h>
+
#include "vt1211.h"
#include "chip.h"
@@ -47,102 +47,120 @@ static unsigned char vt1211hwmonitorinits[]={
0x4c,0x0, 0x4d,0x0, 0x4e,0xf, 0x5d,0x77,
0x5c,0x0, 0x5f,0x33, 0x40,0x1};
-static void start_conf_pnp(int dev)
-{
- outb(0x87,0x2e);
- outb(0x87,0x2e);
- outb(7,0x2e);
- outb(dev,0x2f);
-}
-static void write_pnp(int reg, int val)
+static void pnp_enter_ext_func_mode(device_t dev)
{
- outb(reg,0x2e);
- outb(val,0x2f);
+ outb(0x87, dev->path.u.pnp.port);
+ outb(0x87, dev->path.u.pnp.port);
}
-static void end_conf_pnp()
+
+static void pnp_exit_ext_func_mode(device_t dev)
{
- outb(0xaa,0x2e);
+ outb(0xaa, dev->path.u.pnp.port);
}
-static void vt1211_init(struct superio_via_vt1211_config *conf)
+static void init_hwm(unsigned long base)
{
-
int i;
- // Activate the vt1211 hardware monitor
- if(conf->enable_hwmon){
- start_conf_pnp(0x0b);
- write_pnp(0x60,0xec);
- write_pnp(0x30,1);
- end_conf_pnp();
-
- // initialize vt1211 hardware monitor registers, which are at 0xECXX
- for(i=0;i<sizeof(vt1211hwmonitorinits);i+=2)
- outb(vt1211hwmonitorinits[i+1],0xec00+vt1211hwmonitorinits[i]);
- }
- if( conf->enable_fdc){
- // activate FDC
- start_conf_pnp(0); // fdc is device 0
- write_pnp(0x60,0xfc); // io address
- write_pnp(0x70,0x06); // interupt
- write_pnp(0x74,0x02); // dma
- write_pnp(0x30,0x01); // activate it
- end_conf_pnp();
- }
-
- if( conf->enable_com_ports ){
- // activate com2
- start_conf_pnp(3);
- write_pnp(0x60,0xbe);
- write_pnp(0x70,0x3);
- write_pnp(0xf0,0x02);
- write_pnp(0x30,0x01);
- end_conf_pnp();
- }
- if( conf->enable_lpt ){
- // activate lpt
- start_conf_pnp(1);
- write_pnp(0x60,0xde);
- write_pnp(0x70,0x07);
- write_pnp(0x74,0x3);
- write_pnp(0x30,0x01);
- end_conf_pnp();
+ // initialize vt1211 hardware monitor registers, which are at 0xECXX
+ for(i = 0; i < sizeof(vt1211hwmonitorinits); i += 2) {
+ outb(vt1211hwmonitorinits[i + 1],
+ base + vt1211hwmonitorinits[i]);
}
-
}
-static void superio_init(struct chip *chip, enum chip_pass pass)
+static void vt1211_init(struct device *dev)
{
+ struct superio_via_vt1211_config *conf = dev->chip_info;
+ struct resource *res0;
- struct superio_via_vt1211_config *conf =
- (struct superio_via_vt1211_config *)chip->chip_info;
+ if (!dev->enabled) {
+ return;
+ }
- switch (pass) {
- case CONF_PASS_PRE_PCI:
+ switch (dev->path.u.pnp.device) {
+ case VT1211_SP1:
+ res0 = find_resource(dev, PNP_IDX_IO0);
+ init_uart8250(res0->base, &conf->com1);
break;
-
- case CONF_PASS_POST_PCI:
- vt1211_init(conf);
+ case VT1211_SP2:
+ res0 = find_resource(dev, PNP_IDX_IO0);
+ init_uart8250(res0->base, &conf->com2);
break;
-
- case CONF_PASS_PRE_BOOT:
+ case VT1211_HWM:
+ res0 = find_resource(dev, PNP_IDX_IO0);
+ init_hwm(res0->base);
break;
-
default:
- /* nothing yet */
- break;
+ printk_info("vt1211 asked to initialise unknown device!\n");
}
+
+ /* activate com2
+ start_conf_pnp(3);
+ write_pnp(0x60,0xbe);
+ write_pnp(0x70,0x3);
+ write_pnp(0xf0,0x02);
+ write_pnp(0x30,0x01);
+ end_conf_pnp();
+
+ // Activate the vt1211 hardware monitor
+ start_conf_pnp(0x0b);
+ write_pnp(0x60,0xec);
+ write_pnp(0x30,1);
+ end_conf_pnp(); */
+
+}
+
+void vt1211_pnp_enable_resources(device_t dev)
+{
+ pnp_enter_ext_func_mode(dev);
+ pnp_enable_resources(dev);
+ pnp_exit_ext_func_mode(dev);
}
-static void enumerate(struct chip *chip)
+void vt1211_pnp_set_resources(struct device *dev)
+{
+ pnp_enter_ext_func_mode(dev);
+ pnp_set_resources(dev);
+ pnp_exit_ext_func_mode(dev);
+}
+
+void vt1211_pnp_enable(device_t dev)
+{
+ if (!dev->enabled) {
+ pnp_enter_ext_func_mode(dev);
+ pnp_set_logical_device(dev);
+ pnp_set_enable(dev, 0);
+ pnp_exit_ext_func_mode(dev);
+ }
+}
+
+struct device_operations ops = {
+ .read_resources = pnp_read_resources,
+ .set_resources = vt1211_pnp_set_resources,
+ .enable_resources = vt1211_pnp_enable_resources,
+ .enable = vt1211_pnp_enable,
+ .init = vt1211_init,
+};
+
+static struct pnp_info pnp_dev_info[] = {
+ { &ops, VT1211_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
+ { &ops, VT1211_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
+ { &ops, VT1211_SP1, PNP_IO0 | PNP_IRQ0, { 0x07f8, 0}, },
+ { &ops, VT1211_SP2, PNP_IO0 | PNP_IRQ0, { 0x07f8, 0}, },
+ { &ops, VT1211_HWM, PNP_IO0 , { 0xfff8, 0 }, },
+};
+
+static void enable_dev(struct device *dev)
{
- extern struct device_operations default_pci_ops_bus;
- chip_enumerate(chip);
- chip->dev->ops = &default_pci_ops_bus;
+ printk_debug("vt1211 enabling PNP devices.\n");
+ pnp_enable_devices(dev,
+ &ops,
+ sizeof(pnp_dev_info) / sizeof(pnp_dev_info[0]),
+ pnp_dev_info);
}
-struct chip_operations superio_via_vt1211_control = {
+struct chip_operations superio_via_vt1211_ops = {
CHIP_NAME("VIA vt1211")
- .enumerate = enumerate,
- .enable = superio_init,
+ .enable_dev = enable_dev,
};
diff --git a/src/superio/via/vt1211/vt1211.h b/src/superio/via/vt1211/vt1211.h
index 0d3d620df2..e23cf77504 100644
--- a/src/superio/via/vt1211/vt1211.h
+++ b/src/superio/via/vt1211/vt1211.h
@@ -18,5 +18,17 @@
* MA 02111-1307 USA
*/
- /* vt1211 routines and defines*/
+/* vt1211 PNP devices */
+#define VT1211_FDC 0 /* Floppy */
+#define VT1211_PP 1 /* Parallel Port */
+#define VT1211_SP1 2 /* COM1 */
+#define VT1211_SP2 3 /* COM2 */
+#define VT1211_MIDI 6 /* MIDI */
+#define VT1211_GAME 7 /* Game port */
+#define VT1211_GPIO 8 /* GPIO pins */
+#define VT1211_WATCHDOG 9 /* Watchdog timer */
+#define VT1211_WAKEUP 10 /* Wakeup control */
+#define VT1211_HWM 11 /* Hardware monitor */
+#define VT1211_FIR 12 /* Irda */
+#define VT1211_ROM 13 /* ROM control */