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authorBora Guvendik <bora.guvendik@intel.com>2018-03-30 16:03:32 -0700
committerPatrick Georgi <pgeorgi@google.com>2019-05-23 09:04:41 +0000
commitddf2bc5081e0eafc33af40a06f4217c5c851fa3f (patch)
tree3a0dec85d5c60ada99c08fdbce00cb7dd2634572
parentb7fe7a1a8e033706f39c0fded5901f0f1dce7cfb (diff)
downloadcoreboot-ddf2bc5081e0eafc33af40a06f4217c5c851fa3f.tar.xz
coreboot_tables: pass the early_mmc_wake_hw status to payload
Pass the return value from early_mmc_wake_hw() to the payload so that payload can skip sending CMD0 and resetting the card in case of success or in case of a failure in firmware, payload can recover by sending CMD0 and resetting the card. BUG=b:78106689 TEST=Boot to OS Change-Id: Ia4c57d05433c3966118c3642913d7017958cce55 Signed-off-by: Bora Guvendik <bora.guvendik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/25464 Reviewed-by: Lijian Zhao <lijian.zhao@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--payloads/libpayload/include/coreboot_tables.h15
-rw-r--r--payloads/libpayload/include/sysinfo.h1
-rw-r--r--payloads/libpayload/libc/coreboot.c10
-rw-r--r--src/commonlib/include/commonlib/coreboot_tables.h15
-rw-r--r--src/lib/coreboot_table.c19
5 files changed, 60 insertions, 0 deletions
diff --git a/payloads/libpayload/include/coreboot_tables.h b/payloads/libpayload/include/coreboot_tables.h
index 92e3f26180..705e348666 100644
--- a/payloads/libpayload/include/coreboot_tables.h
+++ b/payloads/libpayload/include/coreboot_tables.h
@@ -287,6 +287,21 @@ struct cb_macs {
struct mac_address mac_addrs[0];
};
+#define CB_TAG_MMC_INFO 0x0034
+struct cb_mmc_info {
+ uint32_t tag;
+ uint32_t size;
+ /*
+ * Passes the early mmc status to payload to indicate if firmware
+ * successfully sent CMD0, CMD1 to the card or not. In case of
+ * success, the payload can skip the first step of the initialization
+ * sequence which is to send CMD0, and instead start by sending CMD1
+ * as described in Jedec Standard JESD83-B1 section 6.4.3.
+ * passes 1 on success
+ */
+ int32_t early_cmd1_status;
+};
+
#define CB_TAG_SERIALNO 0x002a
#define CB_MAX_SERIALNO_LENGTH 32
diff --git a/payloads/libpayload/include/sysinfo.h b/payloads/libpayload/include/sysinfo.h
index 7e6e74809d..72059adb91 100644
--- a/payloads/libpayload/include/sysinfo.h
+++ b/payloads/libpayload/include/sysinfo.h
@@ -129,6 +129,7 @@ struct sysinfo_t {
uint64_t mtc_start;
uint32_t mtc_size;
void *chromeos_vpd;
+ int mmc_early_wake_status;
};
extern struct sysinfo_t lib_sysinfo;
diff --git a/payloads/libpayload/libc/coreboot.c b/payloads/libpayload/libc/coreboot.c
index 3982e47ec2..26a3a48c23 100644
--- a/payloads/libpayload/libc/coreboot.c
+++ b/payloads/libpayload/libc/coreboot.c
@@ -102,6 +102,13 @@ static void cb_parse_vbnv(unsigned char *ptr, struct sysinfo_t *info)
info->vbnv_size = vbnv->range_size;
}
+static void cb_parse_mmc_info(unsigned char *ptr, struct sysinfo_t *info)
+{
+ struct cb_mmc_info *mmc_info = (struct cb_mmc_info *)ptr;
+
+ info->mmc_early_wake_status = mmc_info->early_cmd1_status;
+}
+
static void cb_parse_gpios(unsigned char *ptr, struct sysinfo_t *info)
{
int i;
@@ -399,6 +406,9 @@ int cb_parse_header(void *addr, int len, struct sysinfo_t *info)
case CB_TAG_SPI_FLASH:
cb_parse_spi_flash(ptr, info);
break;
+ case CB_TAG_MMC_INFO:
+ cb_parse_mmc_info(ptr, info);
+ break;
case CB_TAG_MTC:
cb_parse_mtc(ptr, info);
break;
diff --git a/src/commonlib/include/commonlib/coreboot_tables.h b/src/commonlib/include/commonlib/coreboot_tables.h
index 198ad27b87..99ab21c724 100644
--- a/src/commonlib/include/commonlib/coreboot_tables.h
+++ b/src/commonlib/include/commonlib/coreboot_tables.h
@@ -385,6 +385,21 @@ struct mac_address {
uint8_t pad[2]; /* Pad it to 8 bytes to keep it simple. */
};
+#define LB_TAG_MMC_INFO 0x0034
+struct lb_mmc_info {
+ uint32_t tag;
+ uint32_t size;
+ /*
+ * Passes the early mmc status to payload to indicate if firmware
+ * successfully sent CMD0, CMD1 to the card or not. In case of
+ * success, the payload can skip the first step of the initialization
+ * sequence which is to send CMD0, and instead start by sending CMD1
+ * as described in Jedec Standard JESD83-B1 section 6.4.3.
+ * passes 1 on success
+ */
+ int32_t early_cmd1_status;
+};
+
struct lb_macs {
uint32_t tag;
uint32_t size;
diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c
index 6e44f5d3d5..14cd030202 100644
--- a/src/lib/coreboot_table.c
+++ b/src/lib/coreboot_table.c
@@ -321,6 +321,22 @@ static void lb_sku_id(struct lb_header *header)
printk(BIOS_INFO, "SKU ID: %d\n", sid);
}
+static void lb_mmc_info(struct lb_header *header)
+{
+ struct lb_mmc_info *rec;
+ int32_t *ms_cbmem;
+
+ ms_cbmem = cbmem_find(CBMEM_ID_MMC_STATUS);
+ if (!ms_cbmem)
+ return;
+
+ rec = (struct lb_mmc_info *)lb_new_record(header);
+
+ rec->tag = LB_TAG_MMC_INFO;
+ rec->size = sizeof(*rec);
+ rec->early_cmd1_status = *ms_cbmem;
+}
+
static void add_cbmem_pointers(struct lb_header *header)
{
/*
@@ -559,6 +575,9 @@ static uintptr_t write_coreboot_table(uintptr_t rom_table_end)
lb_ram_code(head);
lb_sku_id(head);
+ /* Pass mmc early init status */
+ lb_mmc_info(head);
+
/* Add SPI flash description if available */
if (CONFIG(BOOT_DEVICE_SPI_FLASH))
lb_spi_flash(head);