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authorPatrick Rudolph <siro@das-labor.org>2017-09-18 18:21:02 +0200
committerPatrick Rudolph <siro@das-labor.org>2017-09-25 16:18:38 +0000
commitdf27690df354169309970cfe5ebd292d2bf9ab3d (patch)
tree52480f254747792c25a8f8a26107db1b32d099b3
parent3b0f5426af8288bb039922405122282532cfa422 (diff)
downloadcoreboot-df27690df354169309970cfe5ebd292d2bf9ab3d.tar.xz
mb/lenovo/x2?0/devicetree: Fix regression of BDC detection
The x220 and x230 do have BDC detection, but it's broken. Disable BDC detection on those two boards, and add a comment why it doesn't work. The issue has been reported and tested on Lenovo X220. Change-Id: Id1ccc2c4387370e284ff8964e1c41d945cefe74c Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/21587 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
-rw-r--r--src/mainboard/lenovo/x220/devicetree.cb8
-rw-r--r--src/mainboard/lenovo/x230/devicetree.cb8
2 files changed, 10 insertions, 6 deletions
diff --git a/src/mainboard/lenovo/x220/devicetree.cb b/src/mainboard/lenovo/x220/devicetree.cb
index 1332cd8548..ae2a03ec09 100644
--- a/src/mainboard/lenovo/x220/devicetree.cb
+++ b/src/mainboard/lenovo/x220/devicetree.cb
@@ -165,9 +165,11 @@ chip northbridge/intel/sandybridge
register "eventd_enable" = "0xff"
register "evente_enable" = "0x0d"
- register "has_bdc_detection" = "1"
- register "bdc_gpio_num" = "54"
- register "bdc_gpio_lvl" = "0"
+ # BDC detection is broken on this board:
+ # BDC shorts pin14 and pin1
+ # BDC's connector pin14 is left floating
+ # BDC's connector pin1 is routed to SB GPIO 54
+ register "has_bdc_detection" = "0"
end
end # LPC bridge
device pci 1f.2 on
diff --git a/src/mainboard/lenovo/x230/devicetree.cb b/src/mainboard/lenovo/x230/devicetree.cb
index d7f56476df..41e13f6c75 100644
--- a/src/mainboard/lenovo/x230/devicetree.cb
+++ b/src/mainboard/lenovo/x230/devicetree.cb
@@ -167,9 +167,11 @@ chip northbridge/intel/sandybridge
register "eventd_enable" = "0xff"
register "evente_enable" = "0x0d"
- register "has_bdc_detection" = "1"
- register "bdc_gpio_num" = "54"
- register "bdc_gpio_lvl" = "0"
+ # BDC detection is broken on this board:
+ # BDC shorts pin14 and pin1
+ # BDC's connector pin14 is left floating
+ # BDC's connector pin1 is routed to SB GPIO 54
+ register "has_bdc_detection" = "0"
end
end # LPC bridge
device pci 1f.2 on