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authorArthur Heymans <arthur@aheymans.xyz>2017-05-01 18:36:59 +0200
committerArthur Heymans <arthur@aheymans.xyz>2017-05-20 10:31:06 +0200
commite729366d7a5246eeae6a9b0bb30271fc92ac5136 (patch)
tree574afd1b16915bb14a110b1c8a2ddf6453ddba97
parent1222162d12eeecd266c7124b6978a5d21d51cc6e (diff)
downloadcoreboot-e729366d7a5246eeae6a9b0bb30271fc92ac5136.tar.xz
nb/intel/x4x/raminit: Remove very long delay
It is not really known why there is such a long delay, but it works fine without it. TESTED on ga-g41m-es2l. Change-Id: Idff5b978bbf161f8520d8000848e7b11c98c3945 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/19514 Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
-rw-r--r--src/northbridge/intel/x4x/raminit_ddr2.c2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/northbridge/intel/x4x/raminit_ddr2.c b/src/northbridge/intel/x4x/raminit_ddr2.c
index 35caaa6b73..2178e24505 100644
--- a/src/northbridge/intel/x4x/raminit_ddr2.c
+++ b/src/northbridge/intel/x4x/raminit_ddr2.c
@@ -1923,8 +1923,6 @@ void raminit_ddr2(struct sysinfo *s)
die("Error: DDR is faster than FSB, halt\n");
}
- mdelay(250);
-
// Program clock crossing
clkcross_ddr2(s);
printk(BIOS_DEBUG, "Done clk crossing\n");