diff options
author | Vladimir Serbinenko <phcoder@gmail.com> | 2014-10-10 09:38:44 +0200 |
---|---|---|
committer | Vladimir Serbinenko <phcoder@gmail.com> | 2014-10-18 22:05:00 +0200 |
commit | e7ff9d8839b0f7718f208f31bb7e7e504a97c657 (patch) | |
tree | 8302b8d030dd6483eb80aa1533c71111851be2b1 | |
parent | e6e5b5ef556904ab5d03f7b6f750b4d25df961f4 (diff) | |
download | coreboot-e7ff9d8839b0f7718f208f31bb7e7e504a97c657.tar.xz |
fsp_sandybridge: Move to per-device ACPI.
Just took combined sandybridge per-device ACPI patch and applied it
on FSP flavour to avoid need of separate tests.
Change-Id: I09838cc01ede504416078edcb1c267a11539e714
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/7044
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
-rw-r--r-- | src/mainboard/intel/cougar_canyon2/acpi_tables.c | 156 | ||||
-rw-r--r-- | src/northbridge/intel/fsp_sandybridge/Kconfig | 2 | ||||
-rw-r--r-- | src/northbridge/intel/fsp_sandybridge/acpi.c | 15 | ||||
-rw-r--r-- | src/northbridge/intel/fsp_sandybridge/northbridge.c | 1 | ||||
-rw-r--r-- | src/southbridge/intel/fsp_bd82x6x/Kconfig | 1 | ||||
-rw-r--r-- | src/southbridge/intel/fsp_bd82x6x/acpi/globalnvs.asl | 4 | ||||
-rw-r--r-- | src/southbridge/intel/fsp_bd82x6x/lpc.c | 33 | ||||
-rw-r--r-- | src/southbridge/intel/fsp_bd82x6x/nvs.h | 1 |
8 files changed, 56 insertions, 157 deletions
diff --git a/src/mainboard/intel/cougar_canyon2/acpi_tables.c b/src/mainboard/intel/cougar_canyon2/acpi_tables.c index 60ad5c82d2..dca35b55c0 100644 --- a/src/mainboard/intel/cougar_canyon2/acpi_tables.c +++ b/src/mainboard/intel/cougar_canyon2/acpi_tables.c @@ -30,11 +30,6 @@ #include <device/pci_ids.h> #include <cpu/x86/msr.h> -extern const unsigned char AmlCode[]; -#if CONFIG_HAVE_ACPI_SLIC -unsigned long acpi_create_slic(unsigned long current); -#endif - #include "southbridge/intel/fsp_bd82x6x/nvs.h" #include "thermal.h" @@ -48,7 +43,7 @@ static void acpi_update_thermal_table(global_nvs_t *gnvs) gnvs->flvl = 5; } -static void acpi_create_gnvs(global_nvs_t *gnvs) +void acpi_create_gnvs(global_nvs_t *gnvs) { gnvs_ = gnvs; memset((void *)gnvs, 0, sizeof(*gnvs)); @@ -97,13 +92,6 @@ unsigned long acpi_fill_madt(unsigned long current) return current; } -unsigned long acpi_fill_ssdt_generator(unsigned long current, - const char *oem_table_id) -{ - generate_cpu_entries(); - return (unsigned long) (acpigen_get_current()); -} - unsigned long acpi_fill_slit(unsigned long current) { // Not implemented @@ -115,145 +103,3 @@ unsigned long acpi_fill_srat(unsigned long current) /* No NUMA, no SRAT */ return current; } - -void smm_setup_structures(void *gnvs, void *tcg, void *smi1); - -#define ALIGN_CURRENT current = (ALIGN(current, 16)) -unsigned long write_acpi_tables(unsigned long start) -{ - unsigned long current; - int i; - acpi_rsdp_t *rsdp; - acpi_rsdt_t *rsdt; - acpi_xsdt_t *xsdt; - acpi_hpet_t *hpet; - acpi_madt_t *madt; - acpi_mcfg_t *mcfg; - acpi_fadt_t *fadt; - acpi_facs_t *facs; -#if CONFIG_HAVE_ACPI_SLIC - acpi_header_t *slic; -#endif - acpi_header_t *ssdt; - acpi_header_t *dsdt; - - current = start; - - /* Align ACPI tables to 16byte */ - ALIGN_CURRENT; - - printk(BIOS_INFO, "ACPI: Writing ACPI tables at %lx.\n", start); - - /* We need at least an RSDP and an RSDT Table */ - rsdp = (acpi_rsdp_t *) current; - current += sizeof(acpi_rsdp_t); - ALIGN_CURRENT; - rsdt = (acpi_rsdt_t *) current; - current += sizeof(acpi_rsdt_t); - ALIGN_CURRENT; - xsdt = (acpi_xsdt_t *) current; - current += sizeof(acpi_xsdt_t); - ALIGN_CURRENT; - - /* clear all table memory */ - memset((void *) start, 0, current - start); - - acpi_write_rsdp(rsdp, rsdt, xsdt); - acpi_write_rsdt(rsdt); - acpi_write_xsdt(xsdt); - - printk(BIOS_DEBUG, "ACPI: * FACS\n"); - facs = (acpi_facs_t *) current; - current += sizeof(acpi_facs_t); - ALIGN_CURRENT; - acpi_create_facs(facs); - - printk(BIOS_DEBUG, "ACPI: * DSDT\n"); - dsdt = (acpi_header_t *) current; - memcpy(dsdt, &AmlCode, sizeof(acpi_header_t)); - current += dsdt->length; - memcpy(dsdt, &AmlCode, dsdt->length); - - ALIGN_CURRENT; - - printk(BIOS_DEBUG, "ACPI: * FADT\n"); - fadt = (acpi_fadt_t *) current; - current += sizeof(acpi_fadt_t); - ALIGN_CURRENT; - - acpi_create_fadt(fadt, facs, dsdt); - acpi_add_table(rsdp, fadt); - - /* - * We explicitly add these tables later on: - */ - printk(BIOS_DEBUG, "ACPI: * HPET\n"); - - hpet = (acpi_hpet_t *) current; - current += sizeof(acpi_hpet_t); - ALIGN_CURRENT; - acpi_create_hpet(hpet); - acpi_add_table(rsdp, hpet); - - /* If we want to use HPET Timers Linux wants an MADT */ - printk(BIOS_DEBUG, "ACPI: * MADT\n"); - - madt = (acpi_madt_t *) current; - acpi_create_madt(madt); - current += madt->header.length; - ALIGN_CURRENT; - acpi_add_table(rsdp, madt); - - printk(BIOS_DEBUG, "ACPI: * MCFG\n"); - mcfg = (acpi_mcfg_t *) current; - acpi_create_mcfg(mcfg); - current += mcfg->header.length; - ALIGN_CURRENT; - acpi_add_table(rsdp, mcfg); - - /* Pack GNVS into the ACPI table area */ - for (i=0; i < dsdt->length; i++) { - if (*(u32*)(((u32)dsdt) + i) == 0xC0DEBABE) { - printk(BIOS_DEBUG, "ACPI: Patching up global NVS in " - "DSDT at offset 0x%04x -> 0x%08lx\n", i, current); - *(u32*)(((u32)dsdt) + i) = current; // 0x92 bytes - acpi_save_gnvs(current); - break; - } - } - - /* And fill it */ - acpi_create_gnvs((global_nvs_t *)current); - - /* And tell SMI about it */ - smm_setup_structures((void *)current, NULL, NULL); - - current += sizeof(global_nvs_t); - ALIGN_CURRENT; - - /* We patched up the DSDT, so we need to recalculate the checksum */ - dsdt->checksum = 0; - dsdt->checksum = acpi_checksum((void *)dsdt, dsdt->length); - - printk(BIOS_DEBUG, "ACPI: * DSDT @ %p Length %x\n", dsdt, - dsdt->length); - -#if CONFIG_HAVE_ACPI_SLIC - printk(BIOS_DEBUG, "ACPI: * SLIC\n"); - slic = (acpi_header_t *)current; - current += acpi_create_slic(current); - ALIGN_CURRENT; - acpi_add_table(rsdp, slic); -#endif - - printk(BIOS_DEBUG, "ACPI: * SSDT\n"); - ssdt = (acpi_header_t *)current; - acpi_create_ssdt_generator(ssdt, ACPI_TABLE_CREATOR); - current += ssdt->length; - acpi_add_table(rsdp, ssdt); - ALIGN_CURRENT; - - printk(BIOS_DEBUG, "current = %lx\n", current); - printk(BIOS_INFO, "ACPI: done.\n"); - return current; -} diff --git a/src/northbridge/intel/fsp_sandybridge/Kconfig b/src/northbridge/intel/fsp_sandybridge/Kconfig index 94fd3304f0..4eb5b8efa0 100644 --- a/src/northbridge/intel/fsp_sandybridge/Kconfig +++ b/src/northbridge/intel/fsp_sandybridge/Kconfig @@ -21,10 +21,12 @@ config NORTHBRIDGE_INTEL_FSP_SANDYBRIDGE bool select CPU_INTEL_FSP_MODEL_206AX + select PER_DEVICE_ACPI_TABLES config NORTHBRIDGE_INTEL_FSP_IVYBRIDGE bool select CPU_INTEL_FSP_MODEL_306AX + select PER_DEVICE_ACPI_TABLES if NORTHBRIDGE_INTEL_FSP_IVYBRIDGE || NORTHBRIDGE_INTEL_FSP_SANDYBRIDGE diff --git a/src/northbridge/intel/fsp_sandybridge/acpi.c b/src/northbridge/intel/fsp_sandybridge/acpi.c index faef4d71f9..d820139db4 100644 --- a/src/northbridge/intel/fsp_sandybridge/acpi.c +++ b/src/northbridge/intel/fsp_sandybridge/acpi.c @@ -29,7 +29,10 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <build.h> +#include <drivers/intel/gma/i915.h> +#include <arch/acpigen.h> #include "northbridge.h" +#include <cbmem.h> unsigned long acpi_fill_mcfg(unsigned long current) { @@ -198,3 +201,15 @@ int init_igd_opregion(igd_opregion_t *opregion) return 0; } + +void *igd_make_opregion(void) +{ + igd_opregion_t *opregion; + + printk(BIOS_DEBUG, "ACPI: * IGD OpRegion\n"); + opregion = cbmem_add(CBMEM_ID_IGD_OPREGION, sizeof (*opregion)); + if (opregion) + init_igd_opregion(opregion); + return opregion; +} + diff --git a/src/northbridge/intel/fsp_sandybridge/northbridge.c b/src/northbridge/intel/fsp_sandybridge/northbridge.c index 182252d00b..a16453638e 100644 --- a/src/northbridge/intel/fsp_sandybridge/northbridge.c +++ b/src/northbridge/intel/fsp_sandybridge/northbridge.c @@ -354,6 +354,7 @@ static struct device_operations mc_ops = { .enable = northbridge_enable, .scan_bus = 0, .ops_pci = &intel_pci_ops, + .acpi_fill_ssdt_generator = generate_cpu_entries, }; static const struct pci_driver mc_driver_0100 __pci_driver = { diff --git a/src/southbridge/intel/fsp_bd82x6x/Kconfig b/src/southbridge/intel/fsp_bd82x6x/Kconfig index b2b4929348..f628270b2b 100644 --- a/src/southbridge/intel/fsp_bd82x6x/Kconfig +++ b/src/southbridge/intel/fsp_bd82x6x/Kconfig @@ -32,6 +32,7 @@ config SOUTH_BRIDGE_OPTIONS # dummy select PCIEXP_ASPM select PCIEXP_COMMON_CLOCK select SPI_FLASH + select PER_DEVICE_ACPI_TABLES config EHCI_BAR hex diff --git a/src/southbridge/intel/fsp_bd82x6x/acpi/globalnvs.asl b/src/southbridge/intel/fsp_bd82x6x/acpi/globalnvs.asl index 2fe092d952..be1eafb1c7 100644 --- a/src/southbridge/intel/fsp_bd82x6x/acpi/globalnvs.asl +++ b/src/southbridge/intel/fsp_bd82x6x/acpi/globalnvs.asl @@ -31,8 +31,8 @@ Name(\DSEN, 1) // Display Output Switching Enable * we have to fix it up in coreboot's ACPI creation phase. */ - -OperationRegion (GNVS, SystemMemory, 0xC0DEBABE, 0xf00) +External(NVSA) +OperationRegion (GNVS, SystemMemory, NVSA, 0xf00) Field (GNVS, ByteAcc, NoLock, Preserve) { /* Miscellaneous */ diff --git a/src/southbridge/intel/fsp_bd82x6x/lpc.c b/src/southbridge/intel/fsp_bd82x6x/lpc.c index 8c1596725d..2fc3ea7e7b 100644 --- a/src/southbridge/intel/fsp_bd82x6x/lpc.c +++ b/src/southbridge/intel/fsp_bd82x6x/lpc.c @@ -31,7 +31,12 @@ #include <arch/acpi.h> #include <cpu/cpu.h> #include <elog.h> +#include <arch/acpigen.h> +#include <drivers/intel/gma/i915.h> +#include <cbmem.h> +#include <string.h> #include "pch.h" +#include "nvs.h" #define NMI_OFF 0 @@ -625,6 +630,32 @@ static void set_subsystem(device_t dev, unsigned vendor, unsigned device) } } +static void southbridge_inject_dsdt(void) +{ + global_nvs_t *gnvs = cbmem_add (CBMEM_ID_ACPI_GNVS, sizeof (*gnvs)); + void *opregion; + + /* Calling northbridge code as gnvs contains opregion address. */ + opregion = igd_make_opregion(); + + if (gnvs) { + int scopelen; + + memset(gnvs, 0, sizeof (*gnvs)); + + acpi_create_gnvs(gnvs); + /* IGD OpRegion Base Address */ + gnvs->aslb = (u32)opregion; + /* And tell SMI about it */ + smm_setup_structures(gnvs, NULL, NULL); + + /* Add it to DSDT. */ + scopelen = acpigen_write_scope("\\"); + scopelen += acpigen_write_name_dword("NVSA", (u32) gnvs); + acpigen_patch_len(scopelen - 1); + } +} + static struct pci_operations pci_ops = { .set_subsystem = set_subsystem, }; @@ -633,6 +664,8 @@ static struct device_operations device_ops = { .read_resources = pch_lpc_read_resources, .set_resources = pci_dev_set_resources, .enable_resources = pch_lpc_enable_resources, + .write_acpi_tables = acpi_write_hpet, + .acpi_inject_dsdt_generator = southbridge_inject_dsdt, .init = lpc_init, .enable = pch_lpc_enable, .scan_bus = scan_static_bus, diff --git a/src/southbridge/intel/fsp_bd82x6x/nvs.h b/src/southbridge/intel/fsp_bd82x6x/nvs.h index 8889f02f27..8557c022e5 100644 --- a/src/southbridge/intel/fsp_bd82x6x/nvs.h +++ b/src/southbridge/intel/fsp_bd82x6x/nvs.h @@ -156,3 +156,4 @@ typedef struct { /* Used in SMM to find the ACPI GNVS address */ global_nvs_t *smm_get_gnvs(void); #endif +void acpi_create_gnvs(global_nvs_t *gnvs); |