diff options
| author | Caveh Jalali <caveh@chromium.org> | 2018-08-01 18:53:29 -0700 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2018-08-09 07:52:00 +0000 |
| commit | ea45ecfb89add18bb4ed1a8f6f3d4337307c124c (patch) | |
| tree | 459efcf75ec4b8b974185fc221ae56cce3db9a2f | |
| parent | 248c60a672faacd5e3adb4df5204ff9d97e55b3d (diff) | |
| download | coreboot-ea45ecfb89add18bb4ed1a8f6f3d4337307c124c.tar.xz | |
mb/google/poppy/variants/atlas: Do not override icc_max
Skylake SoC code now sets the icc_max based on the CPU SKU, so we
should not hard-code it in the device tree.
BUG=b:110890675
BRANCH=None
TEST=boots on atlas
Change-Id: I7eb3499b7bea9ab2c49e1f299e2dbb688c8d1c33
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://review.coreboot.org/27791
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Gaggery Tsai <gaggery.tsai@intel.com>
| -rw-r--r-- | src/mainboard/google/poppy/variants/atlas/devicetree.cb | 6 |
1 files changed, 1 insertions, 5 deletions
diff --git a/src/mainboard/google/poppy/variants/atlas/devicetree.cb b/src/mainboard/google/poppy/variants/atlas/devicetree.cb index f2c2a12198..c96081cd87 100644 --- a/src/mainboard/google/poppy/variants/atlas/devicetree.cb +++ b/src/mainboard/google/poppy/variants/atlas/devicetree.cb @@ -86,7 +86,7 @@ chip soc/intel/skylake #| Psi4Enable | 1 | 1 | 1 | 1 | #| ImonSlope | 0 | 0 | 0 | 0 | #| ImonOffset | 0 | 0 | 0 | 0 | - #| IccMax | 4A | 24A | 24A | 24A | + #| IccMax | set by SoC code per CPU SKU | #| VrVoltageLimit | 1.52V | 1.52V | 1.52V | 1.52V | #| AcLoadline | 14.75 | 4.42 | 4.7 | 4.7 | #| DcLoadline | 14.2 | 4.2 | 4.41 | 4.41 | @@ -100,7 +100,6 @@ chip soc/intel/skylake .psi4enable = 1, .imon_slope = 0x0, .imon_offset = 0x0, - .icc_max = VR_CFG_AMP(4), .voltage_limit = 1520, .ac_loadline = 1475, .dc_loadline = 1420, @@ -115,7 +114,6 @@ chip soc/intel/skylake .psi4enable = 1, .imon_slope = 0x0, .imon_offset = 0x0, - .icc_max = VR_CFG_AMP(24), .voltage_limit = 1520, .ac_loadline = 442, .dc_loadline = 420, @@ -130,7 +128,6 @@ chip soc/intel/skylake .psi4enable = 1, .imon_slope = 0x0, .imon_offset = 0x0, - .icc_max = VR_CFG_AMP(24), .voltage_limit = 1520, .ac_loadline = 470, .dc_loadline = 441, @@ -145,7 +142,6 @@ chip soc/intel/skylake .psi4enable = 1, .imon_slope = 0x0, .imon_offset = 0x0, - .icc_max = VR_CFG_AMP(24), .voltage_limit = 1520, .ac_loadline = 470, .dc_loadline = 441, |