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authorFelix Held <felix-coreboot@felixheld.de>2020-12-01 21:29:59 +0100
committerFelix Held <felix-coreboot@felixheld.de>2020-12-02 21:28:19 +0000
commitf42da176de685ebc6432da1008c408876060dced (patch)
tree6d18b89d302265152c2c8ff1bececa45adfd6d20
parent43a5f88bb428080ab6e361ef6bc5e92169ee8452 (diff)
downloadcoreboot-f42da176de685ebc6432da1008c408876060dced.tar.xz
soc/amd/common/smbus: remove misleading definition
SMBHST_STAT_NOERROR was a redefinition of SMBHST_STAT_INTERRUPT that was used in smbus_wait_until_done. Remove the misleading bit definition that also didn't correspond with the register definitions and replace it with the definition of the actual bit that gets checked. Also add a comment that the code actually checks the IRQ status flag to see if the last command is already completed. Change-Id: I1a58fe0d58d3887dd2e83320e977a57e271685b3 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48219 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
-rw-r--r--src/soc/amd/common/block/include/amdblocks/smbus.h1
-rw-r--r--src/soc/amd/common/block/smbus/smbus.c3
2 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/amd/common/block/include/amdblocks/smbus.h b/src/soc/amd/common/block/include/amdblocks/smbus.h
index 773daf796c..73f63b02eb 100644
--- a/src/soc/amd/common/block/include/amdblocks/smbus.h
+++ b/src/soc/amd/common/block/include/amdblocks/smbus.h
@@ -11,7 +11,6 @@
#define SMBHST_STAT_INTERRUPT (1 << 1)
#define SMBHST_STAT_BUSY (1 << 0)
#define SMBHST_STAT_CLEAR 0xff
-#define SMBHST_STAT_NOERROR (1 << 1) /* TODO: this one looks odd */
#define SMBHST_STAT_VAL_BITS 0x1f
#define SMBHST_STAT_ERROR_BITS 0x1c
diff --git a/src/soc/amd/common/block/smbus/smbus.c b/src/soc/amd/common/block/smbus/smbus.c
index e94adf5bc6..4fb68d425d 100644
--- a/src/soc/amd/common/block/smbus/smbus.c
+++ b/src/soc/amd/common/block/smbus/smbus.c
@@ -69,7 +69,8 @@ static int smbus_wait_until_done(uintptr_t mmio)
val &= SMBHST_STAT_VAL_BITS; /* mask off reserved bits */
if (val & SMBHST_STAT_ERROR_BITS)
return -5; /* error */
- if (val == SMBHST_STAT_NOERROR) {
+ /* check IRQ status bit to see if the last host command is completed */
+ if (val == SMBHST_STAT_INTERRUPT) {
controller_write8(mmio, SMBHSTSTAT, val); /* clr sts */
return 0;
}