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authorYen Lin <yelin@nvidia.com>2015-07-14 11:20:08 -0700
committerPatrick Georgi <pgeorgi@google.com>2015-07-23 16:44:53 +0200
commitff40196c6c5a83b7cf2ceeb2dd027d4f2587b94a (patch)
treef6b84671e3e2e23248404ebf670b422f4ba5a543
parentc2eae1a4f961da7cdba0c68185b503b1600d1f74 (diff)
downloadcoreboot-ff40196c6c5a83b7cf2ceeb2dd027d4f2587b94a.tar.xz
t210: audio: add CLK_V_EXTPERIPH1 clock
For audio to work, need to enable CLK_V_EXTPERIPH1 clock. This CL is needed because after MBIST workaround is applied, CLK_V_EXTPERIPH1 clock is default to be off. BUG=None BRANCH=None TEST=Tested on Smaug, hear beep when press Ctrl+U at serial console when DEV screen is showing Change-Id: I32dccc0c7983f8fa86812d845a2f00ac9881d521 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 149d04e6ba642734d5ea36cac8206fad3ac13ce0 Original-Change-Id: Ifa1afb0798c1039c8ea9084b5a7ee3b09b4d70ac Original-Signed-off-by: Yen Lin <yelin@nvidia.com> Original-Reviewed-on: https://chromium-review.googlesource.com/285604 Original-Reviewed-by: Tom Warren <twarren@nvidia.com> Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: http://review.coreboot.org/11041 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
-rw-r--r--src/soc/nvidia/tegra210/clock.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/nvidia/tegra210/clock.c b/src/soc/nvidia/tegra210/clock.c
index 9cbae81fbb..be44bdf2dc 100644
--- a/src/soc/nvidia/tegra210/clock.c
+++ b/src/soc/nvidia/tegra210/clock.c
@@ -791,6 +791,7 @@ void clock_enable_audio(void)
*/
clock_enable_clear_reset(CLK_L_I2S1 | CLK_L_I2S2 | CLK_L_I2S3 | CLK_L_SPDIF,
0, 0,
- CLK_V_I2S4 | CLK_V_I2S5 | CLK_V_AHUB | CLK_V_APB2APE,
+ CLK_V_I2S4 | CLK_V_I2S5 | CLK_V_AHUB | CLK_V_APB2APE |
+ CLK_V_EXTPERIPH1,
0, 0, 0);
}