diff options
| author | Alexandru Gagniuc <alexandrux.gagniuc@intel.com> | 2015-10-13 17:30:04 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2015-12-30 20:06:52 +0100 |
| commit | 000e8aa3f7d25e3fa30487cb77263e8b66aa26ce (patch) | |
| tree | e14accd2341dc9ad07ec24f6b44f196dd46f62c3 | |
| parent | 8a13743569a8d1ac61b8a52d2dab621ff4041de2 (diff) | |
| download | coreboot-000e8aa3f7d25e3fa30487cb77263e8b66aa26ce.tar.xz | |
MAINTAINERS: Designate Intel maintainers for FSP 1.0 Baytrail
After several internal discussions, teams at Intel with stakes in
coreboot have decided to each assign one or more maintainers. These
maintainers can be expected to provide a point of contact for
assistance with technical (code-related) issues, testing on real
hardware, and making sure that their FSP-related areas continue to
function with upstream coreboot.
They understand that the inclusion of their information in the
MAINTAINERS file does not give them any extra power over their areas.
At the same time, nobody expects any community process to change.
The one expectation is that reasonable efforts be made to contact
these maintainers when making fundamental changes to their areas, or
when discussing code removal.
Change-Id: I62b2eaec8270ac1fce5bfbee3b3da68aba116b0f
Signed-off-by: Alexandru Gagniuc <alexandrux.gagniuc@intel.com>
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/11894
Reviewed-by: York Yang <york.yang@intel.com>
Tested-by: build bot (Jenkins)
| -rw-r--r-- | MAINTAINERS | 18 |
1 files changed, 13 insertions, 5 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index 9680a508d8..bb122513cc 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -154,14 +154,21 @@ F: src/mainboard/intel/cougar_canyon2/ F: src/mainboard/intel/stargo2/ INTEL MINNOWBOARD MAX MAINBOARD +M: Huang Jin <huang.jin@intel.com> +M: York Yang <york.yang@intel.com> M: Martin Roth <gaumless@gmail.com> -S: Maintained +S: Supported F: src/mainboard/intel/minnowmax/ -INTEL FSP BAYTRAIL CHIP +INTEL FSP BAYTRAIL CHIP & CRBs +M: Huang Jin <huang.jin@intel.com> +M: York Yang <york.yang@intel.com> M: Martin Roth <gaumless@gmail.com> -S: Odd Fixes +S: Supported F: src/soc/intel/fsp_baytrail/ +F: src/vendorcode/intel/fsp1_0/baytrail/ +F: src/mainboard/intel/bakersport_fsp/ +F: src/mainboard/intel/bayleybay_fsp/ FSP 1.0 RANGELEY & CRB M: David Guckian <david.guckian@intel.com> @@ -179,10 +186,11 @@ S: Supported F: src/mainboard/intel/littleplains/ INTEL FSP 1.0 +M: Huang Jin <huang.jin@intel.com> +M: York Yang <york.yang@intel.com> M: Martin Roth <gaumless@gmail.com> -S: Odd Fixes +S: Supported F: src/drivers/intel/fsp1_0/ -F: src/vendorcode/intel/fsp1_0/ INTEL FSP 1.1 M: Lee Leahy <leroy.p.leahy@intel.com> |