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authorEric Lai <ericr_lai@compal.corp-partner.google.com>2021-04-27 16:16:39 +0800
committerPatrick Georgi <pgeorgi@google.com>2021-04-29 05:25:33 +0000
commit05877ee1d7e87063f7923467b94c5b3fd6d899ea (patch)
tree8f9e62d119fbf8021ed195928b405fc62d767994
parent51c4d9fbfd9611978627ce6111b1083379a4b829 (diff)
downloadcoreboot-05877ee1d7e87063f7923467b94c5b3fd6d899ea.tar.xz
mb/google/brya: Adjust WWAN power sequence
Follow L850GL spec to adjust power sequence. RST need to drive low before power on then drive to high. SPEC:FIBOCOM_L850-GL Hardware User Manual_V1.0.8 BUG=b:186374631 TEST=WWAN is detected by lsusb. Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com> Change-Id: I13357677bb1ab185abf1d4c915a762a9d6894312 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52694 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
-rw-r--r--src/mainboard/google/brya/variants/baseboard/gpio.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/baseboard/gpio.c b/src/mainboard/google/brya/variants/baseboard/gpio.c
index 5811b58dfc..b7783c0ae2 100644
--- a/src/mainboard/google/brya/variants/baseboard/gpio.c
+++ b/src/mainboard/google/brya/variants/baseboard/gpio.c
@@ -388,6 +388,8 @@ static const struct pad_config early_gpio_table[] = {
PAD_CFG_GPO(GPP_E0, 0, DEEP),
/* E13 : THC0_SPI1_IO2 ==> MEM_CH_SEL */
PAD_CFG_GPI(GPP_E13, NONE, DEEP),
+ /* E16 : RSVD_TP ==> WWAN_RST_L */
+ PAD_CFG_GPO(GPP_E16, 0, DEEP),
/* E15 : RSVD_TP ==> PCH_WP_OD */
PAD_CFG_GPI_GPIO_DRIVER(GPP_E15, NONE, DEEP),
/* H10 : UART0_RXD ==> UART_PCH_RX_DBG_TX */