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| author | Arthur Heymans <arthur@aheymans.xyz> | 2020-10-14 16:35:11 +0200 |
|---|---|---|
| committer | Arthur Heymans <arthur@aheymans.xyz> | 2020-11-27 09:18:20 +0000 |
| commit | 0f34054964a55707af963e86675f6341f506fd47 (patch) | |
| tree | fc142724b2c20bc5ef181dc4b24f80ecfbc876fd | |
| parent | f71572605a2b5438da3f0bacd99bd97a491d4620 (diff) | |
| download | coreboot-0f34054964a55707af963e86675f6341f506fd47.tar.xz | |
Makefile.inc: Move adding mcu FIT entries
This can be done using in the INTERMEDIATE target in the proper place.
Change-Id: I28a7764205e0510be89c131058ec56861a479699
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46453
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-by: Christian Walter <christian.walter@9elements.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | Makefile.inc | 39 | ||||
| -rw-r--r-- | src/cpu/intel/fit/Makefile.inc | 28 |
2 files changed, 32 insertions, 35 deletions
diff --git a/Makefile.inc b/Makefile.inc index 9273961570..fafb9ecd0d 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -1121,8 +1121,6 @@ $(REFCODE_BLOB): $(RMODTOOL) $(RMODTOOL) -i $(CONFIG_REFCODE_BLOB_FILE) -o $@ endif -FIT_ENTRY=$(call strip_quotes, $(CONFIG_INTEL_TOP_SWAP_FIT_ENTRY_FMAP_REG)) - ifeq ($(CONFIG_HAVE_RAMSTAGE),y) RAMSTAGE=$(objcbfs)/ramstage.elf else @@ -1136,42 +1134,13 @@ $(obj)/coreboot.rom: $(obj)/coreboot.pre $(RAMSTAGE) $(CBFSTOOL) $$(INTERMEDIATE dd if=/dev/zero bs=$(call _toint,$(CONFIG_ROM_SIZE)) count=1 2> /dev/null | tr '\000' '\377' > $@.tmp dd if=$(obj)/coreboot.pre of=$@.tmp bs=8192 conv=notrunc 2> /dev/null ifeq ($(CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE),y) -ifneq ($(CONFIG_UPDATE_IMAGE),y) # never update the bootblock -ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER),y) - @printf " UPDATE-FIT\n" - $(IFITTOOL) -f $@.tmp -a -n cpu_microcode_blob.bin -t 1 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) \ - -r COREBOOT -endif -ifeq ($(CONFIG_USE_CPU_MICROCODE_CBFS_BINS),y) - @printf " UPDATE-FIT\n" - $(IFITTOOL) -f $@.tmp -a -n cpu_microcode_blob.bin -t 1 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) \ - -r COREBOOT -endif +# Print final FIT table $(IFITTOOL) -f $@.tmp -D -r COREBOOT - -# Second FIT in TOP_SWAP bootblock +# Print final TS BOOTBLOCK FIT table ifeq ($(CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK),y) -# INTEL_TOP_SWAP_FIT_ENTRY_FMAP_REG adds a region as first ucode into the seconds bootblock -ifneq ($(FIT_ENTRY),) - @printf " UPDATE-FIT2\n" - $(IFITTOOL) -f $@.tmp -A -n $(FIT_ENTRY) -t 1 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) \ - $(TS_OPTIONS) -r COREBOOT -endif -ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER),y) - @printf " UPDATE-FIT2\n" - $(IFITTOOL) -f $@.tmp -a -n cpu_microcode_blob.bin -t 1 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) \ - $(TS_OPTIONS) -r COREBOOT -endif -ifeq ($(CONFIG_USE_CPU_MICROCODE_CBFS_BINS),y) - @printf " UPDATE-FIT2\n" - $(IFITTOOL) -f $@.tmp -a -n cpu_microcode_blob.bin -t 1 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) \ - $(TS_OPTIONS) -r COREBOOT -endif + @printf " TOP SWAP FIT table\n" $(IFITTOOL) -f $@.tmp -D $(TS_OPTIONS) -r COREBOOT - -endif - -endif # !CONFIG_UPDATE_IMAGE +endif # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK endif # CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE mv $@.tmp $@ @printf " CBFSLAYOUT $(subst $(obj)/,,$(@))\n\n" diff --git a/src/cpu/intel/fit/Makefile.inc b/src/cpu/intel/fit/Makefile.inc index 4b540ba5df..98666843e9 100644 --- a/src/cpu/intel/fit/Makefile.inc +++ b/src/cpu/intel/fit/Makefile.inc @@ -1 +1,29 @@ bootblock-y += fit.S + +FIT_ENTRY=$(call strip_quotes, $(CONFIG_INTEL_TOP_SWAP_FIT_ENTRY_FMAP_REG)) + +ifneq ($(CONFIG_UPDATE_IMAGE),y) # never update the bootblock + +ifneq ($(CONFIG_CPU_MICROCODE_CBFS_NONE),y) + +INTERMEDIATE+=add_mcu_fit +add_mcu_fit: $(obj)/coreboot.pre $(IFITTOOL) + @printf " UPDATE-FIT Microcode\n" + $(IFITTOOL) -f $< -a -n cpu_microcode_blob.bin -t 1 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) -r COREBOOT + +# Second FIT in TOP_SWAP bootblock +ifeq ($(CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK),y) + +INTERMEDIATE+=add_ts_mcu_fit +add_ts_mcu_fit: $(obj)/coreboot.pre $(IFITTOOL) + @printf " UPDATE-FIT Top Swap: Microcode\n" +ifneq ($(FIT_ENTRY),) + $(IFITTOOL) -f $< -A -n $(FIT_ENTRY) -t 1 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) $(TS_OPTIONS) -r COREBOOT +endif # FIT_ENTRY + $(IFITTOOL) -f $< -a -n cpu_microcode_blob.bin -t 1 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) $(TS_OPTIONS) -r COREBOOT + +endif # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK + +endif # CONFIG_CPU_MICROCODE_CBFS_NONE + +endif # CONFIG_UPDATE_IMAGE |