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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-07-20 07:20:50 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-07-21 15:36:00 +0200 |
| commit | 150f476c966eb09eeb2c4c57769415f7cc15b768 (patch) | |
| tree | 3071f353e6f3507aa0188d60abc71cb507d5ec0a | |
| parent | a877b74a79028cef9a6a50a40c6d895de5c88fbd (diff) | |
| download | coreboot-150f476c966eb09eeb2c4c57769415f7cc15b768.tar.xz | |
timestamp: Drop duplicate TS_END_ROMSTAGE entries
This entry gets added in run_ramstage().
Change-Id: I18cda4ead3614c6d07c3269cbee53e6def6408c7
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/15755
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
| -rw-r--r-- | src/mainboard/asus/kcma-d8/romstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/asus/kgpe-d16/romstage.c | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/fsp_i89xx/romstage.c | 2 |
3 files changed, 0 insertions, 6 deletions
diff --git a/src/mainboard/asus/kcma-d8/romstage.c b/src/mainboard/asus/kcma-d8/romstage.c index cf0ab39591..3f96c52ff7 100644 --- a/src/mainboard/asus/kcma-d8/romstage.c +++ b/src/mainboard/asus/kcma-d8/romstage.c @@ -588,8 +588,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) pci_write_config16(PCI_DEV(0, 0x14, 0), 0x56, 0x0bb0); pci_write_config16(PCI_DEV(0, 0x14, 0), 0x5a, 0x0ff0); - timestamp_add_now(TS_END_ROMSTAGE); - post_cache_as_ram(); // BSP switch stack to ram, copy then execute LB. post_code(0x43); // Should never see this post code. } diff --git a/src/mainboard/asus/kgpe-d16/romstage.c b/src/mainboard/asus/kgpe-d16/romstage.c index 8825b23167..fd3411a2e7 100644 --- a/src/mainboard/asus/kgpe-d16/romstage.c +++ b/src/mainboard/asus/kgpe-d16/romstage.c @@ -629,8 +629,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) pci_write_config16(PCI_DEV(0, 0x14, 0), 0x56, 0x0bb0); pci_write_config16(PCI_DEV(0, 0x14, 0), 0x5a, 0x0ff0); - timestamp_add_now(TS_END_ROMSTAGE); - post_cache_as_ram(); // BSP switch stack to ram, copy then execute LB. post_code(0x43); // Should never see this post code. } diff --git a/src/southbridge/intel/fsp_i89xx/romstage.c b/src/southbridge/intel/fsp_i89xx/romstage.c index 5bcc8fa794..f20d73d567 100644 --- a/src/southbridge/intel/fsp_i89xx/romstage.c +++ b/src/southbridge/intel/fsp_i89xx/romstage.c @@ -212,8 +212,6 @@ void romstage_main_continue(EFI_STATUS status, VOID *HobListPtr) { *(uint32_t*)cbmem_hob_ptr = (uint32_t)HobListPtr; post_code(0x4f); - timestamp_add_now(TS_END_ROMSTAGE); - run_ramstage(); } |