diff options
author | Angel Pons <th3fanbus@gmail.com> | 2020-09-02 19:57:34 +0200 |
---|---|---|
committer | Angel Pons <th3fanbus@gmail.com> | 2020-09-12 23:00:12 +0000 |
commit | 1b89f5eeab3f28c6d4d096203c9bd0deaf21f19e (patch) | |
tree | b263006718d1bb843cde3054afadd79083ef8cff | |
parent | 042edd389be9461d69a754f9df9b7a68ff9a3a16 (diff) | |
download | coreboot-1b89f5eeab3f28c6d4d096203c9bd0deaf21f19e.tar.xz |
soc/intel/common/block/*/Kconfig: Guard options with if-blocks
The usual structure of these files is a global enable symbol, usually
followed by an if-block which contains all other dependent symbols.
Use this instead of having a `depends on` line to each symbol. Guard all
symbols, even if they originally were not guarded, since they don't do
anything useful unless the global enable option is selected.
Change-Id: If5347187b07a46192f0063011ab197b5047f555f
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45043
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r-- | src/soc/intel/common/block/gpio/Kconfig | 10 | ||||
-rw-r--r-- | src/soc/intel/common/block/sgx/Kconfig | 6 | ||||
-rw-r--r-- | src/soc/intel/common/block/uart/Kconfig | 5 |
3 files changed, 12 insertions, 9 deletions
diff --git a/src/soc/intel/common/block/gpio/Kconfig b/src/soc/intel/common/block/gpio/Kconfig index bdbc323c12..753d8e0a7e 100644 --- a/src/soc/intel/common/block/gpio/Kconfig +++ b/src/soc/intel/common/block/gpio/Kconfig @@ -4,42 +4,40 @@ config SOC_INTEL_COMMON_BLOCK_GPIO help Intel Processor common GPIO support +if SOC_INTEL_COMMON_BLOCK_GPIO + # Use to program Interrupt Polarity Control (IPCx) register # Each bit represents IRQx Active High Polarity Disable configuration: # when set to 1, the interrupt polarity associated with IRQx is inverted # to appear as Active Low to IOAPIC and vice versa config SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG - depends on SOC_INTEL_COMMON_BLOCK_GPIO bool default n # Used to configure Pad Tolerance as 1.8V or 3.3V config SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL - depends on SOC_INTEL_COMMON_BLOCK_GPIO bool default n # Used to configure IOSSTATE and IOSTERM config SOC_INTEL_COMMON_BLOCK_GPIO_IOSTANDBY - depends on SOC_INTEL_COMMON_BLOCK_GPIO bool default n # Used to provide support for legacy macros config SOC_INTEL_COMMON_BLOCK_GPIO_LEGACY_MACROS - depends on SOC_INTEL_COMMON_BLOCK_GPIO bool default n # Indicate if multiple ACPI devices are used for each gpio community. config SOC_INTEL_COMMON_BLOCK_GPIO_MULTI_ACPI_DEVICES - depends on SOC_INTEL_COMMON_BLOCK_GPIO bool default n # Indicate if SoC supports dual-routing of GPIOs (to different paths like SCI, # NMI, SMI, IOAPIC). This is required to support IRQ and wake on the same pad. config SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT - depends on SOC_INTEL_COMMON_BLOCK_GPIO bool default n + +endif diff --git a/src/soc/intel/common/block/sgx/Kconfig b/src/soc/intel/common/block/sgx/Kconfig index 6e8323f333..771c54caa5 100644 --- a/src/soc/intel/common/block/sgx/Kconfig +++ b/src/soc/intel/common/block/sgx/Kconfig @@ -6,16 +6,16 @@ config SOC_INTEL_COMMON_BLOCK_SGX help Intel Processor common SGX support +if SOC_INTEL_COMMON_BLOCK_SGX + config SOC_INTEL_COMMON_BLOCK_SGX_LOCK_MEMORY bool - depends on SOC_INTEL_COMMON_BLOCK_SGX default n help Lock memory before SGX activation. This is only needed if MCHECK does not do it. config SOC_INTEL_COMMON_BLOCK_SGX_ENABLE bool "Enable Software Guard Extensions (SGX) if available" - depends on SOC_INTEL_COMMON_BLOCK_SGX default n help Intel Software Guard Extensions (SGX) is a set of new CPU instructions that can be @@ -70,3 +70,5 @@ config SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_DISABLED bool "Disabled" endchoice + +endif diff --git a/src/soc/intel/common/block/uart/Kconfig b/src/soc/intel/common/block/uart/Kconfig index 7d30c41402..3437ec7477 100644 --- a/src/soc/intel/common/block/uart/Kconfig +++ b/src/soc/intel/common/block/uart/Kconfig @@ -4,9 +4,10 @@ config SOC_INTEL_COMMON_BLOCK_UART help Intel Processor common UART support +if SOC_INTEL_COMMON_BLOCK_UART + config INTEL_LPSS_UART_FOR_CONSOLE bool - depends on SOC_INTEL_COMMON_BLOCK_UART select DRIVERS_UART_8250MEM_32 select FIXED_UART_FOR_CONSOLE help @@ -14,3 +15,5 @@ config INTEL_LPSS_UART_FOR_CONSOLE for the coreboot console. WARNING: UART_FOR_CONSOLE has to be set to a correct value, otherwise wrong pad configurations might be selected. + +endif |