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author | Arthur Heymans <arthur@aheymans.xyz> | 2018-01-18 23:40:04 +0100 |
---|---|---|
committer | Arthur Heymans <arthur@aheymans.xyz> | 2018-01-20 14:35:31 +0000 |
commit | 1e931f3e47a24855bd18146ccbaed31273510d6a (patch) | |
tree | 2262c2c17259f921aa4dca7bd2fc904f140097bd | |
parent | c8c3aca81846210c101ce326d0bb3c6417da5ef9 (diff) | |
download | coreboot-1e931f3e47a24855bd18146ccbaed31273510d6a.tar.xz |
autoport: Don't include default_irq_route.asl
This file is no longer there since ACPI pirq routing is now done in an
automated fashion in SSDT.
Change-Id: I8bafafbf670fe0fc2f20b46b5d8abee722931c6d
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/23323
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Christoph Pomaska <cp_public@posteo.de>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
-rw-r--r-- | util/autoport/bd82x6x.go | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/util/autoport/bd82x6x.go b/util/autoport/bd82x6x.go index dc5d6897f4..d342a79d85 100644 --- a/util/autoport/bd82x6x.go +++ b/util/autoport/bd82x6x.go @@ -297,8 +297,6 @@ func (b bd82x6x) Scan(ctx Context, addr PCIDevData) { }) DSDTPCI0Includes = append(DSDTPCI0Includes, DSDTInclude{ File: "southbridge/intel/bd82x6x/acpi/pch.asl", - }, DSDTInclude{ - File: "southbridge/intel/bd82x6x/acpi/default_irq_route.asl", }) sb := Create(ctx, "early_southbridge.c") |