arm(64): Change write32() argument order to match x86

This patch changes the argument order for the (now temporarily unused)
write32() accessor macro (and equivalents for other lengths) from
(value, address) to (address, value) in order to conform with the
equivalent on x86. Also removes one remaining use of write32() on ARM
that slipped through since coccinelle doesn't inspect header files.

BRANCH=none
BUG=chromium:444723
TEST=Compiled Cosmos, Daisy, Blaze, Pit, Ryu, Storm and Pinky.

Change-Id: Id5739b144f6a5cfd40958ea68510dcf0b89fbfa9
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: f02cae8b04f2042530bafc91346d11bb666aa42d
Original-Change-Id: Ia91c2c19d8444e853a2fc12590a52c2b6447a1b9
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/254863
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/9835
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

6 files changed, 16 insertions, 16 deletions

diff --git a/src/arch/arm/include/arch/io.h b/src/arch/arm/include/arch/io.h
index 9037ab91fd..51d96b9255 100644
--- a/src/arch/arm/include/arch/io.h
+++ b/src/arch/arm/include/arch/io.h
@@ -32,11 +32,11 @@
  * re-factor all code to specify the data length intended.
   */
 #define readb(a)	read8(a)
-#define writeb(v,a)	write8(v,a)
+#define writeb(v,a)	write8(a,v)
 #define readw(a)	read16(a)
-#define writew(v,a)	write16(v,a)
+#define writew(v,a)	write16(a,v)
 #define readl(a)	read32(a)
-#define writel(v,a)	write32(v,a)
+#define writel(v,a)	write32(a,v)
 
 /*
  * Clear and set bits in one shot. These macros can be used to clear and
diff --git a/src/arch/arm/include/armv4/arch/arch_io.h b/src/arch/arm/include/armv4/arch/arch_io.h
index 72653da3f3..cf5a9e115e 100644
--- a/src/arch/arm/include/armv4/arch/arch_io.h
+++ b/src/arch/arm/include/armv4/arch/arch_io.h
@@ -40,17 +40,17 @@ static inline uint32_t read32(const void *addr)
 	return *(volatile uint32_t *)addr;
 }
 
-static inline void write8(uint8_t val, void *addr)
+static inline void write8(void *addr, uint8_t val)
 {
 	*(volatile uint8_t *)addr = val;
 }
 
-static inline void write16(uint16_t val, void *addr)
+static inline void write16(void *addr, uint16_t val)
 {
 	*(volatile uint16_t *)addr = val;
 }
 
-static inline void write32(uint32_t val, void *addr)
+static inline void write32(void *addr, uint32_t val)
 {
 	*(volatile uint32_t *)addr = val;
 }
diff --git a/src/arch/arm/include/armv7/arch/arch_io.h b/src/arch/arm/include/armv7/arch/arch_io.h
index 360fa6425a..53eafc6967 100644
--- a/src/arch/arm/include/armv7/arch/arch_io.h
+++ b/src/arch/arm/include/armv7/arch/arch_io.h
@@ -44,21 +44,21 @@ static inline uint32_t read32(const void *addr)
 	return *(volatile uint32_t *)addr;
 }
 
-static inline void write8(uint8_t val, void *addr)
+static inline void write8(void *addr, uint8_t val)
 {
 	dmb();
 	*(volatile uint8_t *)addr = val;
 	dmb();
 }
 
-static inline void write16(uint16_t val, void *addr)
+static inline void write16(void *addr, uint16_t val)
 {
 	dmb();
 	*(volatile uint16_t *)addr = val;
 	dmb();
 }
 
-static inline void write32(uint32_t val, void *addr)
+static inline void write32(void *addr, uint32_t val)
 {
 	dmb();
 	*(volatile uint32_t *)addr = val;
diff --git a/src/arch/arm64/include/arch/io.h b/src/arch/arm64/include/arch/io.h
index cd75fb8920..9ec13dcf8b 100644
--- a/src/arch/arm64/include/arch/io.h
+++ b/src/arch/arm64/include/arch/io.h
@@ -32,9 +32,9 @@
  * re-factor all code to specify the data length intended.
   */
 #define readb(a)	read8(a)
-#define writeb(v,a)	write8(v,a)
+#define writeb(v,a)	write8(a,v)
 #define readl(a)	read32(a)
-#define writel(v,a)	write32(v,a)
+#define writel(v,a)	write32(a,v)
 
 /*
  * Clear and set bits in one shot. These macros can be used to clear and
diff --git a/src/arch/arm64/include/armv8/arch/arch_io.h b/src/arch/arm64/include/armv8/arch/arch_io.h
index 7d97c31dff..96a15d72a2 100644
--- a/src/arch/arm64/include/armv8/arch/arch_io.h
+++ b/src/arch/arm64/include/armv8/arch/arch_io.h
@@ -45,21 +45,21 @@ static inline uint32_t read32(const void *addr)
 	return *(volatile uint32_t *)addr;
 }
 
-static inline void write8(uint8_t val, void *addr)
+static inline void write8(void *addr, uint8_t val)
 {
 	dmb();
 	*(volatile uint8_t *)addr = val;
 	dmb();
 }
 
-static inline void write16(uint16_t val, void *addr)
+static inline void write16(void *addr, uint16_t val)
 {
 	dmb();
 	*(volatile uint16_t *)addr = val;
 	dmb();
 }
 
-static inline void write32(uint32_t val, void *addr)
+static inline void write32(void *addr, uint32_t val)
 {
 	dmb();
 	*(volatile uint32_t *)addr = val;
diff --git a/src/soc/qualcomm/ipq806x/include/soc/iomap.h b/src/soc/qualcomm/ipq806x/include/soc/iomap.h
index 412ff77c35..f2500f1cbf 100644
--- a/src/soc/qualcomm/ipq806x/include/soc/iomap.h
+++ b/src/soc/qualcomm/ipq806x/include/soc/iomap.h
@@ -44,8 +44,8 @@
    macros for read/write. Hence, special macros for readl_i and writel_i are
    included to do this in one place for all occurrences in vendor code
  */
-#define readl_i(a)           read32((const void *)(a))
-#define writel_i(v,a)        write32(v,(void *)a)
+#define readl_i(a)           readl((const void *)(a))
+#define writel_i(v,a)        writel(v,(void *)a)
 #define clrsetbits_le32_i(addr, clear, set)  \
 	clrsetbits_le32(((void *)(addr)), (clear), (set))