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| author | Ronald G. Minnich <rminnich@gmail.com> | 2006-04-18 22:40:53 +0000 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2006-04-18 22:40:53 +0000 |
| commit | 36c00aa39b9374fbf5f762fb9ebb022bce1f7fa0 (patch) | |
| tree | f46ad7fd13899a14cbf83a7d7dea6bca717b1249 | |
| parent | 61083dad0f03af10192ab65ebb0a2af98b9af8a4 (diff) | |
| download | coreboot-36c00aa39b9374fbf5f762fb9ebb022bce1f7fa0.tar.xz | |
fix adjustment for sizeram
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2259 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
| -rw-r--r-- | src/northbridge/amd/gx2/northbridge.c | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/src/northbridge/amd/gx2/northbridge.c b/src/northbridge/amd/gx2/northbridge.c index 981d5375e1..809a440e77 100644 --- a/src/northbridge/amd/gx2/northbridge.c +++ b/src/northbridge/amd/gx2/northbridge.c @@ -14,6 +14,11 @@ #include <cpu/x86/cache.h> #define NORTHBRIDGE_FILE "northbridge.c" + +/* number of MB to take off the top of ram for VSM and display memory. + * FIXME -- make this configurable + */ +#define RAMADJUSTMB 9 /* */ @@ -139,7 +144,7 @@ setup_gx2_cache(void) val |= ((unsigned long long) DEVICE_PROPERTIES) << 28; /* sigh. Take our TOM, RIGHT shift 12, since it page-aligned, then LEFT-shift 8 for reg. */ /* yank off 8M for frame buffer and 1M for VSA */ - sizembytes -= 9; + sizembytes -= RAMADJUSTMB; sizereg = sizembytes; sizereg *= 0x100000; sizereg >>= 12; @@ -434,7 +439,7 @@ static void enable_dev(struct device *dev) do_vsmbios(); dev->ops = &pci_domain_ops; pci_set_method(dev); - ram_resource(dev, 0, 0, sizeram()*1024); + ram_resource(dev, 0, 0, (sizeram() - RAMADJUSTMB)*1024); } else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) { printk_debug("DEVICE_PATH_APIC_CLUSTER\n"); |