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authorKyösti Mälkki <kyosti.malkki@gmail.com>2021-01-11 18:40:37 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2021-01-24 19:57:17 +0000
commit37eb24be1585a76b293999df43e9a83af7d7ba09 (patch)
tree8eac61f2ff5fe10be56b29cdf375a505751642dd
parentcc975c5c65c27f13c00dc7eabec02386002a2c53 (diff)
downloadcoreboot-37eb24be1585a76b293999df43e9a83af7d7ba09.tar.xz
ACPI: Clean up GNVS initialisation
With the common <soc/nvs.h> approach platform does not need to implement the common accessors or sizeof() function. Change-Id: I1050a252f765c763c1ae2d1610cbfb0d973ba026 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49793 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
-rw-r--r--src/acpi/Makefile.inc3
-rw-r--r--src/acpi/acpi.c3
-rw-r--r--src/acpi/gnvs.c38
-rw-r--r--src/acpi/nvs.c15
-rw-r--r--src/include/acpi/acpi_gnvs.h12
-rw-r--r--src/lib/hardwaremain.c2
6 files changed, 19 insertions, 54 deletions
diff --git a/src/acpi/Makefile.inc b/src/acpi/Makefile.inc
index 4d8f3ad892..86f29e4681 100644
--- a/src/acpi/Makefile.inc
+++ b/src/acpi/Makefile.inc
@@ -10,8 +10,7 @@ ramstage-y += acpigen_ps2_keybd.c
ramstage-y += acpigen_usb.c
ramstage-y += device.c
ramstage-$(CONFIG_CHROMEOS) += chromeos-gnvs.c
-ramstage-y += gnvs.c
-ramstage-$(CONFIG_ACPI_SOC_NVS) += nvs.c
+ramstage-$(CONFIG_ACPI_SOC_NVS) += gnvs.c
ramstage-y += pld.c
ramstage-y += sata.c
ramstage-y += soundwire.c
diff --git a/src/acpi/acpi.c b/src/acpi/acpi.c
index 6f64d108f9..05ada084ab 100644
--- a/src/acpi/acpi.c
+++ b/src/acpi/acpi.c
@@ -1473,7 +1473,8 @@ unsigned long write_acpi_tables(unsigned long start)
acpigen_set_current((char *) current);
- acpi_fill_gnvs();
+ if (CONFIG(ACPI_SOC_NVS))
+ acpi_fill_gnvs();
for (dev = all_devices; dev; dev = dev->next)
if (dev->ops && dev->ops->acpi_inject_dsdt)
diff --git a/src/acpi/gnvs.c b/src/acpi/gnvs.c
index 18a4d5d951..a895a83e83 100644
--- a/src/acpi/gnvs.c
+++ b/src/acpi/gnvs.c
@@ -4,11 +4,13 @@
#include <acpi/acpigen.h>
#include <cbmem.h>
#include <console/console.h>
+#include <soc/nvs.h>
+#include <stdint.h>
#include <string.h>
#include <types.h>
#include <vendorcode/google/chromeos/gnvs.h>
-static void *gnvs;
+static struct global_nvs *gnvs;
void *acpi_get_gnvs(void)
{
@@ -23,38 +25,18 @@ void *acpi_get_gnvs(void)
return NULL;
}
-static void gnvs_assign_cbmc(void)
-{
- uint32_t *gnvs_cbmc = gnvs_cbmc_ptr(gnvs);
- if (gnvs_cbmc)
- *gnvs_cbmc = (uintptr_t)cbmem_find(CBMEM_ID_CONSOLE);
-}
-
-/* Needs implementation in platform code. */
-__weak uint32_t *gnvs_cbmc_ptr(struct global_nvs *gnvs_)
-{
- return NULL;
-}
-
__weak void soc_fill_gnvs(struct global_nvs *gnvs_) { }
__weak void mainboard_fill_gnvs(struct global_nvs *gnvs_) { }
-void *gnvs_get_or_create(void)
+void acpi_create_gnvs(void)
{
size_t gnvs_size;
- if (gnvs)
- return gnvs;
-
- gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS);
- if (gnvs)
- return gnvs;
-
- gnvs_size = gnvs_size_of_array();
- if (!gnvs_size)
- return NULL;
+ if (cbmem_find(CBMEM_ID_ACPI_GNVS))
+ return;
/* Match with OpRegion declared in global_nvs.asl. */
+ gnvs_size = sizeof(struct global_nvs);
if (gnvs_size < 0x100)
gnvs_size = 0x100;
if (gnvs_size > 0x1000)
@@ -64,17 +46,15 @@ void *gnvs_get_or_create(void)
gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, gnvs_size);
if (!gnvs)
- return NULL;
+ return;
memset(gnvs, 0, gnvs_size);
if (CONFIG(CONSOLE_CBMEM))
- gnvs_assign_cbmc();
+ gnvs->cbmc = (uintptr_t)cbmem_find(CBMEM_ID_CONSOLE);
if (CONFIG(CHROMEOS))
gnvs_assign_chromeos((u8 *)gnvs + GNVS_CHROMEOS_ACPI_OFFSET);
-
- return gnvs;
}
void acpi_fill_gnvs(void)
diff --git a/src/acpi/nvs.c b/src/acpi/nvs.c
deleted file mode 100644
index 12d124f64f..0000000000
--- a/src/acpi/nvs.c
+++ /dev/null
@@ -1,15 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-
-#include <acpi/acpi_gnvs.h>
-#include <soc/nvs.h>
-#include <stdint.h>
-
-size_t gnvs_size_of_array(void)
-{
- return sizeof(struct global_nvs);
-}
-
-uint32_t *gnvs_cbmc_ptr(struct global_nvs *gnvs)
-{
- return &gnvs->cbmc;
-}
diff --git a/src/include/acpi/acpi_gnvs.h b/src/include/acpi/acpi_gnvs.h
index c0e8aed526..936a922827 100644
--- a/src/include/acpi/acpi_gnvs.h
+++ b/src/include/acpi/acpi_gnvs.h
@@ -5,22 +5,22 @@
#include <types.h>
+void acpi_create_gnvs(void);
+#if CONFIG(ACPI_SOC_NVS)
void *acpi_get_gnvs(void);
-void *gnvs_get_or_create(void);
+#else
+static inline void *acpi_get_gnvs(void) { return NULL; }
+#endif
void gnvs_assign_chromeos(void *gnvs_section);
void gnvs_set_ecfw_rw(void);
-/* Platform code must implement these. */
-struct global_nvs;
-size_t gnvs_size_of_array(void);
-uint32_t *gnvs_cbmc_ptr(struct global_nvs *gnvs);
-
/*
* These functions populate the gnvs structure in acpi table.
* Defined as weak in common acpi as gnvs structure definition is
* chipset specific.
*/
+struct global_nvs;
void soc_fill_gnvs(struct global_nvs *gnvs);
void mainboard_fill_gnvs(struct global_nvs *gnvs);
diff --git a/src/lib/hardwaremain.c b/src/lib/hardwaremain.c
index 53ba753efe..895a942222 100644
--- a/src/lib/hardwaremain.c
+++ b/src/lib/hardwaremain.c
@@ -450,7 +450,7 @@ void main(void)
/* Initialise GNVS early. */
if (CONFIG(ACPI_SOC_NVS))
- gnvs_get_or_create();
+ acpi_create_gnvs();
/* Schedule the static boot state entries. */
boot_state_schedule_static_entries();