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authorChris Zhou <chris_zhou@compal.corp-partner.google.com>2019-02-14 17:56:07 +0800
committerDuncan Laurie <dlaurie@chromium.org>2019-02-15 02:03:35 +0000
commit391709154c3898458fd8614521a2eab2d0534aae (patch)
tree2db0f130f131051cb8a9a80a0a4ed2c10dd7488a
parentccb53e181726ddd90ec6d5a2b6d6b62ab8bd6a70 (diff)
downloadcoreboot-391709154c3898458fd8614521a2eab2d0534aae.tar.xz
mb/google/sarien/variants/sarien: Enable Elan touchscreen
Eanble Elan touch for sarien EVT build BUG=b:119763054 BRANCH=master TEST=Verify touchscreen on sarien works with this change. Signed-off-by: Chris Zhou <chris_zhou@compal.corp-partner.google.com> Change-Id: I790436338705fc9d68f714245e9b9bb518ddb30a Reviewed-on: https://review.coreboot.org/c/31413 Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/mainboard/google/sarien/variants/sarien/devicetree.cb13
1 files changed, 13 insertions, 0 deletions
diff --git a/src/mainboard/google/sarien/variants/sarien/devicetree.cb b/src/mainboard/google/sarien/variants/sarien/devicetree.cb
index d3d26f9800..d6563fb3eb 100644
--- a/src/mainboard/google/sarien/variants/sarien/devicetree.cb
+++ b/src/mainboard/google/sarien/variants/sarien/devicetree.cb
@@ -235,6 +235,19 @@ chip soc/intel/cannonlake
register "hid_desc_reg_offset" = "0x0"
device i2c 10 on end
end
+ chip drivers/i2c/hid
+ register "generic.hid" = ""ELAN900C""
+ register "generic.desc" = ""ELAN Touchscreen""
+ register "generic.irq" = "ACPI_IRQ_EDGE_LOW(GPP_C23_IRQ)"
+ register "generic.probed" = "1"
+ register "generic.enable_gpio" =
+ "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E7)"
+ register "generic.enable_delay_ms" = "5"
+ register "generic.enable_off_delay_ms" = "100"
+ register "generic.has_power_resource" = "1"
+ register "hid_desc_reg_offset" = "0x01"
+ device i2c 10 on end
+ end
end # I2C #0
device pci 15.1 on
chip drivers/i2c/generic