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authorAaron Durbin <adurbin@chromium.org>2015-01-23 14:13:23 -0600
committerPatrick Georgi <pgeorgi@google.com>2015-04-14 12:07:39 +0200
commit47f18d46e0872c51b5f732b1de07eb8d43481d02 (patch)
treef993fb39fc217eaf4ead0c5e5a3dabc12e55f331
parentfa14385ac5ae265269e328100d13ac4400e21e0c (diff)
downloadcoreboot-47f18d46e0872c51b5f732b1de07eb8d43481d02.tar.xz
tegra132: lock down VPR
The GPU MMU won't function properly until it sees the VPR is locked down. Therefore, do the appropriate work. BUG=None BRANCH=None TEST=Built. Change-Id: I6011c75c1e6c231f2fa416e0057cb5805a88a2bb Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Original-Commit-Id: ca9cc9917b98a148442468d1d1541a0408ab6c2c Original-Change-Id: I3601f419b561cee392391577ef8db66b9fbd8c1b Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/242910 Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org> Original-Reviewed-by: Tom Warren <twarren@nvidia.com> Reviewed-on: http://review.coreboot.org/9660 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
-rw-r--r--src/soc/nvidia/tegra132/soc.c14
1 files changed, 14 insertions, 0 deletions
diff --git a/src/soc/nvidia/tegra132/soc.c b/src/soc/nvidia/tegra132/soc.c
index a77ffbbff4..476dec7a03 100644
--- a/src/soc/nvidia/tegra132/soc.c
+++ b/src/soc/nvidia/tegra132/soc.c
@@ -30,6 +30,7 @@
#include <soc/addressmap.h>
#include <soc/clock.h>
#include <soc/cpu.h>
+#include <soc/mc.h>
#include <soc/nvidia/tegra/apbmisc.h>
#include <string.h>
#include <timer.h>
@@ -77,6 +78,16 @@ static struct cpu_control_ops cntrl_ops = {
.start_cpu = cntrl_start_cpu,
};
+
+static void lock_down_vpr(void)
+{
+ struct tegra_mc_regs *regs = (void *)(uintptr_t)TEGRA_MC_BASE;
+
+ write32(0, &regs->video_protect_bom);
+ write32(0, &regs->video_protect_size_mb);
+ write32(1, &regs->video_protect_reg_ctrl);
+}
+
static void soc_init(device_t dev)
{
struct soc_nvidia_tegra132_config *cfg;
@@ -87,6 +98,9 @@ static void soc_init(device_t dev)
spintable_init((void *)cfg->spintable_addr);
arch_initialize_cpus(dev, &cntrl_ops);
+ /* Lock down VPR */
+ lock_down_vpr();
+
#if IS_ENABLED(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT)
if (vboot_skip_display_init())
printk(BIOS_INFO, "Skipping display init.\n");