diff options
author | Peter Lemenkov <lemenkov@gmail.com> | 2018-10-15 09:53:23 +0200 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2018-10-19 08:42:06 +0000 |
commit | 4ebf9d359da52779427b544537f17d1753260351 (patch) | |
tree | e4a2e72037cf219ea8ad6b4fea07dca149563127 | |
parent | d5a8155f1b90531201ae578e019182823614bcea (diff) | |
download | coreboot-4ebf9d359da52779427b544537f17d1753260351.tar.xz |
mb/lenovo/*/romstage: Remove explicit power-on defaults
Change-Id: Ib359e4039f87bb87faac040f24f70cc0988c0ea8
Signed-off-by: Peter Lemenkov <lemenkov@gmail.com>
Reviewed-on: https://review.coreboot.org/29107
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
-rw-r--r-- | src/mainboard/lenovo/l520/romstage.c | 2 | ||||
-rw-r--r-- | src/mainboard/lenovo/t420/romstage.c | 1 | ||||
-rw-r--r-- | src/mainboard/lenovo/t420s/romstage.c | 1 | ||||
-rw-r--r-- | src/mainboard/lenovo/t430s/romstage.c | 1 | ||||
-rw-r--r-- | src/mainboard/lenovo/t520/romstage.c | 1 | ||||
-rw-r--r-- | src/mainboard/lenovo/t530/romstage.c | 1 | ||||
-rw-r--r-- | src/mainboard/lenovo/x220/romstage.c | 1 | ||||
-rw-r--r-- | src/mainboard/lenovo/x230/romstage.c | 1 |
8 files changed, 1 insertions, 8 deletions
diff --git a/src/mainboard/lenovo/l520/romstage.c b/src/mainboard/lenovo/l520/romstage.c index 89bc8ef787..9bfe54aacb 100644 --- a/src/mainboard/lenovo/l520/romstage.c +++ b/src/mainboard/lenovo/l520/romstage.c @@ -38,8 +38,8 @@ void pch_enable_lpc(void) void mainboard_rcba_config(void) { - RCBA32(0x3414) = 0x00000000; } + const struct southbridge_usb_port mainboard_usb_ports[] = { { 1, 0, -1 }, { 1, 0, -1 }, diff --git a/src/mainboard/lenovo/t420/romstage.c b/src/mainboard/lenovo/t420/romstage.c index bef256200e..aad83489dd 100644 --- a/src/mainboard/lenovo/t420/romstage.c +++ b/src/mainboard/lenovo/t420/romstage.c @@ -65,7 +65,6 @@ void pch_enable_lpc(void) void mainboard_rcba_config(void) { - RCBA32(BUC) = 0; } // OC3 set in bios to port 2-7, OC7 set in bios to port 10-13 diff --git a/src/mainboard/lenovo/t420s/romstage.c b/src/mainboard/lenovo/t420s/romstage.c index be8052c3ba..8004e2f227 100644 --- a/src/mainboard/lenovo/t420s/romstage.c +++ b/src/mainboard/lenovo/t420s/romstage.c @@ -67,7 +67,6 @@ void pch_enable_lpc(void) void mainboard_rcba_config(void) { - RCBA32(BUC) = 0; } const struct southbridge_usb_port mainboard_usb_ports[] = { diff --git a/src/mainboard/lenovo/t430s/romstage.c b/src/mainboard/lenovo/t430s/romstage.c index 633ba3f142..b409b5e59b 100644 --- a/src/mainboard/lenovo/t430s/romstage.c +++ b/src/mainboard/lenovo/t430s/romstage.c @@ -40,7 +40,6 @@ void pch_enable_lpc(void) void mainboard_rcba_config(void) { - RCBA32(BUC) = 0; } const struct southbridge_usb_port mainboard_usb_ports[] = { diff --git a/src/mainboard/lenovo/t520/romstage.c b/src/mainboard/lenovo/t520/romstage.c index 4fcd651b6a..cdd0d459a5 100644 --- a/src/mainboard/lenovo/t520/romstage.c +++ b/src/mainboard/lenovo/t520/romstage.c @@ -77,7 +77,6 @@ void pch_enable_lpc(void) void mainboard_rcba_config(void) { - RCBA32(BUC) = 0; } const struct southbridge_usb_port mainboard_usb_ports[] = { diff --git a/src/mainboard/lenovo/t530/romstage.c b/src/mainboard/lenovo/t530/romstage.c index 88e07c1712..68dd69409a 100644 --- a/src/mainboard/lenovo/t530/romstage.c +++ b/src/mainboard/lenovo/t530/romstage.c @@ -69,7 +69,6 @@ void pch_enable_lpc(void) void mainboard_rcba_config(void) { - RCBA32(BUC) = 0; } void mainboard_early_init(int s3resume) diff --git a/src/mainboard/lenovo/x220/romstage.c b/src/mainboard/lenovo/x220/romstage.c index 96e0284313..6efcd0116e 100644 --- a/src/mainboard/lenovo/x220/romstage.c +++ b/src/mainboard/lenovo/x220/romstage.c @@ -50,7 +50,6 @@ void pch_enable_lpc(void) void mainboard_rcba_config(void) { - RCBA32(BUC) = 0; } void mainboard_fill_pei_data(struct pei_data *pei_data) diff --git a/src/mainboard/lenovo/x230/romstage.c b/src/mainboard/lenovo/x230/romstage.c index 1ddaedfef2..94bcab361f 100644 --- a/src/mainboard/lenovo/x230/romstage.c +++ b/src/mainboard/lenovo/x230/romstage.c @@ -48,7 +48,6 @@ void pch_enable_lpc(void) void mainboard_rcba_config(void) { - RCBA32(BUC) = 0; } const struct southbridge_usb_port mainboard_usb_ports[] = { |