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| author | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2009-08-27 04:30:47 +0000 |
|---|---|---|
| committer | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2009-08-27 04:30:47 +0000 |
| commit | 5a5b8f5ba9a829c0053227e3111913d37b09ed6d (patch) | |
| tree | 1bf818b3a590e1865494bd1088d3b8e03363f7db | |
| parent | 0d0ede5f132b2efe57430f224dd7068550c95916 (diff) | |
| download | coreboot-5a5b8f5ba9a829c0053227e3111913d37b09ed6d.tar.xz | |
The new resource allocator helped me find a bug in SB600 diagnostics.
The SB600 SATA code printed that two BARs had the same address because
it didn't mask the correct number of bits in the BAR.
Functionality was not affected, but the debug output was incorrect.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Zheng Bao <zheng.bao@amd.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4591 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
| -rw-r--r-- | src/southbridge/amd/sb600/sb600_sata.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/southbridge/amd/sb600/sb600_sata.c b/src/southbridge/amd/sb600/sb600_sata.c index b285a6bc7a..377db10c13 100644 --- a/src/southbridge/amd/sb600/sb600_sata.c +++ b/src/southbridge/amd/sb600/sb600_sata.c @@ -86,10 +86,10 @@ static void sata_init(struct device *dev) /* get base addresss */ sata_bar5 = (u8 *) (pci_read_config32(dev, 0x24) & ~0x3FF); sata_bar0 = pci_read_config16(dev, 0x10) & ~0x7; - sata_bar1 = pci_read_config16(dev, 0x14) & ~0x7; + sata_bar1 = pci_read_config16(dev, 0x14) & ~0x3; sata_bar2 = pci_read_config16(dev, 0x18) & ~0x7; - sata_bar3 = pci_read_config16(dev, 0x1C) & ~0x7; - sata_bar4 = pci_read_config16(dev, 0x20) & ~0x7; + sata_bar3 = pci_read_config16(dev, 0x1C) & ~0x3; + sata_bar4 = pci_read_config16(dev, 0x20) & ~0xf; printk_spew("sata_bar0=%x\n", sata_bar0); /* 3030 */ printk_spew("sata_bar1=%x\n", sata_bar1); /* 3070 */ |