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| author | Nicola Corna <nicola@corna.info> | 2017-09-11 16:51:03 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-10-23 17:04:26 +0000 |
| commit | 5da1e3156c26ddab065ea4b9d2d64513a937f51c (patch) | |
| tree | a2d630527c8c0fc80cd6937a67247d28d51e54b0 | |
| parent | fd0a891ee9ed0947123e893505bdfc8ada408ab9 (diff) | |
| download | coreboot-5da1e3156c26ddab065ea4b9d2d64513a937f51c.tar.xz | |
mb/sapphire/pureplatinumh61: Remove S3 resume delay
It seems that recent changes in coreboot have fixed the raminit issues
on this board; the workaround of 10 ms delay after the S3 resume is not
needed anymore and can be removed.
Change-Id: If8fb97ecf3eb797f53270a053201fafd32031678
Signed-off-by: Nicola Corna <nicola@corna.info>
Reviewed-on: https://review.coreboot.org/21485
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
| -rw-r--r-- | src/mainboard/sapphire/pureplatinumh61/romstage.c | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/src/mainboard/sapphire/pureplatinumh61/romstage.c b/src/mainboard/sapphire/pureplatinumh61/romstage.c index be692f6b98..b9a0b8c801 100644 --- a/src/mainboard/sapphire/pureplatinumh61/romstage.c +++ b/src/mainboard/sapphire/pureplatinumh61/romstage.c @@ -70,13 +70,6 @@ const struct southbridge_usb_port mainboard_usb_ports[] = { void mainboard_early_init(int s3resume) { - if (s3resume) { - /* - * Raminit after S3 resume fails if started too early; a delay - * of 10 ms seems to be sufficient to fix the issue. - */ - mdelay(10); - } } void mainboard_config_superio(void) |