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authorAngel Pons <th3fanbus@gmail.com>2021-01-20 22:48:50 +0100
committerAngel Pons <th3fanbus@gmail.com>2021-01-24 12:06:55 +0000
commit65f81a7b9024290b9b92bda6d1d67ab805fa3986 (patch)
tree8c3308f799a6f155ea62130ec1c867bca8b5e982
parentac1c9bb5cdca24312c669eaaa908b13202e3bb35 (diff)
downloadcoreboot-65f81a7b9024290b9b92bda6d1d67ab805fa3986.tar.xz
broadwell: Flatten `mainboard_pre_raminit`
All Broadwell boards only use the `mainboard_pre_raminit` function to call `mainboard_fill_pei_data` and optionally `mainboard_fill_spd_data`. Move the declaration and weak definition of `mainboard_fill_spd_data` to platform code, replace the call to `mainboard_pre_raminit` in romstage.c with calls to `mainboard_fill_pei_data` and `mainboard_fill_spd_data`, and delete all other instances of `mainboard_pre_raminit` for Broadwell. Finally, delete now-empty romstage.c and spd.h files from mainboards. Change-Id: I3334b20bd7138bb753b996a137ff106e87c6e8a5 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49776 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
-rw-r--r--src/mainboard/google/auron/romstage.c16
-rw-r--r--src/mainboard/google/auron/variant.h1
-rw-r--r--src/mainboard/google/jecht/romstage.c8
-rw-r--r--src/mainboard/google/jecht/spd/spd.c2
-rw-r--r--src/mainboard/google/jecht/spd/spd.h9
-rw-r--r--src/mainboard/intel/wtm2/romstage.c13
-rw-r--r--src/mainboard/purism/librem_bdw/romstage.c11
-rw-r--r--src/soc/intel/broadwell/include/soc/romstage.h2
-rw-r--r--src/soc/intel/broadwell/romstage.c9
9 files changed, 9 insertions, 62 deletions
diff --git a/src/mainboard/google/auron/romstage.c b/src/mainboard/google/auron/romstage.c
deleted file mode 100644
index a3705bc1b8..0000000000
--- a/src/mainboard/google/auron/romstage.c
+++ /dev/null
@@ -1,16 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <console/console.h>
-#include <ec/google/chromeec/ec.h>
-#include <soc/pei_data.h>
-#include <soc/pei_wrapper.h>
-#include <soc/romstage.h>
-#include "variant.h"
-
-void mainboard_pre_raminit(struct romstage_params *rp)
-{
- /* Fill out PEI DATA */
- mainboard_fill_pei_data(&rp->pei_data);
- mainboard_fill_spd_data(&rp->pei_data);
-
-}
diff --git a/src/mainboard/google/auron/variant.h b/src/mainboard/google/auron/variant.h
index 380a373f2d..ba4c58a9e1 100644
--- a/src/mainboard/google/auron/variant.h
+++ b/src/mainboard/google/auron/variant.h
@@ -11,7 +11,6 @@ int variant_smbios_data(struct device *dev, int *handle,
unsigned long *current);
void lan_init(void);
-void mainboard_fill_spd_data(struct pei_data *pei_data);
void fill_spd_for_index(uint8_t spd[], unsigned int index);
#define SPD_LEN 256
diff --git a/src/mainboard/google/jecht/romstage.c b/src/mainboard/google/jecht/romstage.c
index 58db3cf522..5c978baabb 100644
--- a/src/mainboard/google/jecht/romstage.c
+++ b/src/mainboard/google/jecht/romstage.c
@@ -8,16 +8,8 @@
#include <soc/romstage.h>
#include <superio/ite/common/ite.h>
#include <superio/ite/it8772f/it8772f.h>
-#include <mainboard/google/jecht/spd/spd.h>
#include "onboard.h"
-void mainboard_pre_raminit(struct romstage_params *rp)
-{
- /* Fill out PEI DATA */
- mainboard_fill_pei_data(&rp->pei_data);
- mainboard_fill_spd_data(&rp->pei_data);
-}
-
void mainboard_post_raminit(const int s3resume)
{
if (CONFIG(CHROMEOS))
diff --git a/src/mainboard/google/jecht/spd/spd.c b/src/mainboard/google/jecht/spd/spd.c
index 911cf604be..f4454b8fa5 100644
--- a/src/mainboard/google/jecht/spd/spd.c
+++ b/src/mainboard/google/jecht/spd/spd.c
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <soc/pei_data.h>
-#include <mainboard/google/jecht/spd/spd.h>
+#include <soc/romstage.h>
/* Copy SPD data for on-board memory */
void mainboard_fill_spd_data(struct pei_data *pei_data)
diff --git a/src/mainboard/google/jecht/spd/spd.h b/src/mainboard/google/jecht/spd/spd.h
deleted file mode 100644
index 5ebd8c233a..0000000000
--- a/src/mainboard/google/jecht/spd/spd.h
+++ /dev/null
@@ -1,9 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#ifndef MAINBOARD_SPD_H
-#define MAINBOARD_SPD_H
-
-struct pei_data;
-void mainboard_fill_spd_data(struct pei_data *pei_data);
-
-#endif
diff --git a/src/mainboard/intel/wtm2/romstage.c b/src/mainboard/intel/wtm2/romstage.c
deleted file mode 100644
index 1b6539b55d..0000000000
--- a/src/mainboard/intel/wtm2/romstage.c
+++ /dev/null
@@ -1,13 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <console/console.h>
-#include <soc/gpio.h>
-#include <soc/pei_data.h>
-#include <soc/pei_wrapper.h>
-#include <soc/romstage.h>
-
-void mainboard_pre_raminit(struct romstage_params *rp)
-{
- /* Fill out PEI DATA */
- mainboard_fill_pei_data(&rp->pei_data);
-}
diff --git a/src/mainboard/purism/librem_bdw/romstage.c b/src/mainboard/purism/librem_bdw/romstage.c
deleted file mode 100644
index 8ffd078335..0000000000
--- a/src/mainboard/purism/librem_bdw/romstage.c
+++ /dev/null
@@ -1,11 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <soc/pei_data.h>
-#include <soc/pei_wrapper.h>
-#include <soc/romstage.h>
-
-void mainboard_pre_raminit(struct romstage_params *rp)
-{
- /* Fill out PEI DATA */
- mainboard_fill_pei_data(&rp->pei_data);
-}
diff --git a/src/soc/intel/broadwell/include/soc/romstage.h b/src/soc/intel/broadwell/include/soc/romstage.h
index eb51ea151e..9f4eef2316 100644
--- a/src/soc/intel/broadwell/include/soc/romstage.h
+++ b/src/soc/intel/broadwell/include/soc/romstage.h
@@ -11,7 +11,7 @@ struct romstage_params {
struct pei_data pei_data;
};
-void mainboard_pre_raminit(struct romstage_params *params);
+void mainboard_fill_spd_data(struct pei_data *pei_data);
void mainboard_post_raminit(const int s3resume);
void raminit(struct pei_data *pei_data);
diff --git a/src/soc/intel/broadwell/romstage.c b/src/soc/intel/broadwell/romstage.c
index 084c3e6e99..76e1d7e47b 100644
--- a/src/soc/intel/broadwell/romstage.c
+++ b/src/soc/intel/broadwell/romstage.c
@@ -9,11 +9,16 @@
#include <soc/gpio.h>
#include <soc/me.h>
#include <soc/pei_data.h>
+#include <soc/pei_wrapper.h>
#include <soc/pm.h>
#include <soc/romstage.h>
#include <stdint.h>
#include <timestamp.h>
+__weak void mainboard_fill_spd_data(struct pei_data *pei_data)
+{
+}
+
__weak void mainboard_post_raminit(const int s3resume)
{
}
@@ -45,8 +50,8 @@ void mainboard_romstage_entry(void)
/* Initialize GPIOs */
init_gpios(mainboard_gpio_config);
- /* Fill in mainboard pei_date. */
- mainboard_pre_raminit(&rp);
+ mainboard_fill_pei_data(&rp.pei_data);
+ mainboard_fill_spd_data(&rp.pei_data);
post_code(0x32);