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authorAngel Pons <th3fanbus@gmail.com>2021-04-19 10:55:21 +0200
committerMichael Niewöhner <foss@mniewoehner.de>2021-04-19 14:50:35 +0000
commit6b89746644c173a2fbba4d9a4308f2b07c903575 (patch)
treef65b3fc7c2b4be04c3e34144a08fa12c83712f57
parentdf5a6b36b81c2f7ee4663e92b2d3023a84bb1d6f (diff)
downloadcoreboot-6b89746644c173a2fbba4d9a4308f2b07c903575.tar.xz
soc/intel/common/block/smm: Drop stale comment
This comment is most likely a copy-paste leftover from Braswell. Change-Id: I49bfa3cc56539df0b47d2e2bd74b2bfc45421034 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52500 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
-rw-r--r--src/soc/intel/common/block/smm/smihandler.c2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/soc/intel/common/block/smm/smihandler.c b/src/soc/intel/common/block/smm/smihandler.c
index 2c3364ab06..ff87d71e4f 100644
--- a/src/soc/intel/common/block/smm/smihandler.c
+++ b/src/soc/intel/common/block/smm/smihandler.c
@@ -241,8 +241,6 @@ void smihandler_southbridge_sleep(
break;
}
- /* Tri-state specific GPIOS to avoid leakage during S3/S5 */
-
/*
* Write back to the SLP register to cause the originally intended
* event again. We need to set BIT13 (SLP_EN) though to make the