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| author | Paul Menzel <pmenzel@molgen.mpg.de> | 2019-01-07 19:10:40 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-01-09 09:58:59 +0000 |
| commit | 6fffd70435084fb1d3237fcb1a11f11849721e8f (patch) | |
| tree | a1d305ab1d0b3d3bff1ab27fceee006c130ad7a2 | |
| parent | 4513020064cc4765e723f6f3cc2b8a45a0dc6545 (diff) | |
| download | coreboot-6fffd70435084fb1d3237fcb1a11f11849721e8f.tar.xz | |
cpu/amd: Use `get_option()`
Fix warnings on the console.
coreboot-4.9-214-g0dd2014390 Mon Jan 7 15:17:13 UTC 2019 romstage starting...
NOTICE: read_option() used to access CMOS from non-ROMCC code, please use get_option() instead.
NOTICE: read_option() used to access CMOS from non-ROMCC code, please use get_option() instead.
NOTICE: read_option() used to access CMOS from non-ROMCC code, please use get_option() instead.
Change-Id: I8501ff256676cd0ec4b59b28f4f1e0f2a9f74cac
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/c/30715
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
| -rw-r--r-- | src/cpu/amd/family_10h-family_15h/init_cpus.c | 22 |
1 files changed, 16 insertions, 6 deletions
diff --git a/src/cpu/amd/family_10h-family_15h/init_cpus.c b/src/cpu/amd/family_10h-family_15h/init_cpus.c index 2ddbc43ee6..b8e11e4ccc 100644 --- a/src/cpu/amd/family_10h-family_15h/init_cpus.c +++ b/src/cpu/amd/family_10h-family_15h/init_cpus.c @@ -147,6 +147,9 @@ static void for_each_ap(uint32_t bsp_apicid, uint32_t core_range, int8_t node, // here assume the OS don't change our apicid u32 ap_apicid; + u8 nvram; + bool multicore; + u32 nodes; u32 disable_siblings; u32 cores_found; @@ -155,12 +158,13 @@ static void for_each_ap(uint32_t bsp_apicid, uint32_t core_range, int8_t node, /* get_nodes define in ht_wrapper.c */ nodes = get_nodes(); - if (!IS_ENABLED(CONFIG_LOGICAL_CPUS) || - read_option(multi_core, 0) != 0) { // 0 means multi core + multicore = true; + if (get_option(&nvram, "multi_core") == CB_SUCCESS) + multicore = !!nvram; + + disable_siblings = 0; + if (!IS_ENABLED(CONFIG_LOGICAL_CPUS) || !multicore) disable_siblings = 1; - } else { - disable_siblings = 0; - } for (i = 0; i < nodes; i++) { if ((node >= 0) && (i != node)) @@ -635,11 +639,17 @@ static void setup_remote_node(u8 node) //it is running on core0 of node0 void start_other_cores(uint32_t bsp_apicid) { + u8 nvram; u32 nodes; u32 nodeid; + bool multicore; // disable multi_core - if (read_option(multi_core, 0) != 0) { + multicore = true; + if (get_option(&nvram, "multi_core") == CB_SUCCESS) + multicore = !!nvram; + + if (!multicore) { printk(BIOS_DEBUG, "Skip additional core init\n"); return; } |