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| author | Dave Frodin <dave.frodin@se-eng.com> | 2014-08-05 10:20:59 -0600 |
|---|---|---|
| committer | Dave Frodin <dave.frodin@se-eng.com> | 2014-08-06 15:06:17 +0200 |
| commit | 70d4b5261e0667640ed9e137791388aa5c732a8e (patch) | |
| tree | 31a93a251d7bcffdab86dfb22cf924dfe318bc24 | |
| parent | 5103cc3d531b3adf45a7ed70d0d05caa6b43335a (diff) | |
| download | coreboot-70d4b5261e0667640ed9e137791388aa5c732a8e.tar.xz | |
gizmosphere/gizmo: Change the PCIe GPP to two x1 ports
Gizmo sends two southbridge GPP PCIe lanes to its high speed
edge connector. This change will allow developers to create
two x1 slots on an extender card.
Change-Id: Iba6c1a4caf7846d12e3960775d7bc906ca8ff385
Signed-off-by: Dave Frodin <dave.frodin@se-eng.com>
Reviewed-on: http://review.coreboot.org/6499
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
| -rwxr-xr-x | src/mainboard/gizmosphere/gizmo/devicetree.cb | 5 | ||||
| -rwxr-xr-x | src/mainboard/gizmosphere/gizmo/platform_cfg.h | 2 |
2 files changed, 4 insertions, 3 deletions
diff --git a/src/mainboard/gizmosphere/gizmo/devicetree.cb b/src/mainboard/gizmosphere/gizmo/devicetree.cb index 301f79aeeb..8cd4cd3a5e 100755 --- a/src/mainboard/gizmosphere/gizmo/devicetree.cb +++ b/src/mainboard/gizmosphere/gizmo/devicetree.cb @@ -50,10 +50,11 @@ chip northbridge/amd/agesa/family14/root_complex device pci 14.3 on end # LPC 0x439d device pci 14.4 on end # PCIB 0x4384, NOTE: this device must always be enabled or removed device pci 14.5 off end # USB 2 - device pci 15.0 on end # PCIe PortA # PCIe x4 slot off of high speed edge connector + device pci 15.0 on end # PCIe PortA # PCIe x1 to high speed edge connector + device pci 15.1 on end # PCIe PortB # PCIe x1 to high speed edge connector device pci 16.0 off end # OHCI USB3 device pci 16.2 off end # EHCI USB3 - register "gpp_configuration" = "0" #4:0:0:0 + register "gpp_configuration" = "4" # GPP_CFGMODE_X1111 register "boot_switch_sata_ide" = "0" # 0: boot from SATA. 1: IDE end #southbridge/amd/cimx/sb800 device pci 18.0 on end diff --git a/src/mainboard/gizmosphere/gizmo/platform_cfg.h b/src/mainboard/gizmosphere/gizmo/platform_cfg.h index 0c9fa868a7..401d981482 100755 --- a/src/mainboard/gizmosphere/gizmo/platform_cfg.h +++ b/src/mainboard/gizmosphere/gizmo/platform_cfg.h @@ -185,7 +185,7 @@ * GPP_CFGMODE_X2110 * GPP_CFGMODE_X1111 */ -#define GPP_CFGMODE GPP_CFGMODE_X4000 +#define GPP_CFGMODE GPP_CFGMODE_X1111 /** * @def NB_SB_GEN2 |