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authorKevin Chiu <kevin.chiu.17802@gmail.com>2021-02-04 20:09:51 +0800
committerPatrick Georgi <pgeorgi@google.com>2021-02-06 09:08:44 +0000
commit72463720a2aa831c703e2536843f5f58ed32091d (patch)
tree5a7c92996b45e09640d0a0da051c56d9eb666115
parent26b0bad671dd4b0248a7f5e041cfe831d1506e85 (diff)
downloadcoreboot-72463720a2aa831c703e2536843f5f58ed32091d.tar.xz
mb/google/zork: Adjust Dirinboz H1 I2C CLK
Adjust H1 I2C CLK: 404kHz -> 391 kHz BUG=b:178656936 BRANCH=master TEST=1. emerge-zork coreboot chromeos-bootimage 2. power on proto board successfully 3. measure i2c freq by scope is close to 400kHz Change-Id: I9067db9fc7a4d6aa2ce33b86ba6a611dfd5d7838 Signed-off-by: Kevin Chiu <kevin.chiu@quantatw.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50284 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Kangheui Won <khwon@chromium.org>
-rw-r--r--src/mainboard/google/zork/variants/dirinboz/overridetree.cb4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/google/zork/variants/dirinboz/overridetree.cb b/src/mainboard/google/zork/variants/dirinboz/overridetree.cb
index 554cdeac94..0e50d2f70c 100644
--- a/src/mainboard/google/zork/variants/dirinboz/overridetree.cb
+++ b/src/mainboard/google/zork/variants/dirinboz/overridetree.cb
@@ -70,8 +70,8 @@ chip soc/amd/picasso
# I2C3 for H1
register "i2c[3]" = "{
.speed = I2C_SPEED_FAST,
- .rise_time_ns = 184, /* 0 to 1.26v (1.8 * .7) */
- .fall_time_ns = 42, /* 1.26v to 0 */
+ .rise_time_ns = 98, /* 0 to 1.26v (1.8 * .7) */
+ .fall_time_ns = 17, /* 1.26v to 0 */
.early_init = true,
}"