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| author | Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> | 2018-03-23 22:47:45 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-04-06 06:49:20 +0000 |
| commit | 7efdacd748f5292bfe09f2365ace14a614960dd0 (patch) | |
| tree | 12a4a045e6a1881c3fd433b546c615a715b30fb6 | |
| parent | 2004b93aed993aa02bbc588b8d82c22418ac52ec (diff) | |
| download | coreboot-7efdacd748f5292bfe09f2365ace14a614960dd0.tar.xz | |
mb/google/octopus/variants/baseboard: Enable DPTF support
This patch enables DPTF support for Octopus baseboard.
BUG=None
BRANCH=None
TEST=None
Change-Id: I88a94c73ef0c9da708c0440f7edadd85488edfdb
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/25342
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
| -rw-r--r-- | src/mainboard/google/octopus/variants/baseboard/devicetree.cb | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb index aee8668a54..7072b7874f 100644 --- a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb @@ -46,6 +46,9 @@ chip soc/intel/apollolake # Enable lpss s0ix register "lpss_s0ix_enable" = "1" + # Enable DPTF + register "dptf_enable" = "1" + # Enable Audio Clock and Power gating register "hdaudio_clk_gate_enable" = "1" register "hdaudio_pwr_gate_enable" = "1" |