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authorStefan Reinauer <stepan@coresystems.de>2010-05-14 16:44:45 +0000
committerStefan Reinauer <stepan@openbios.org>2010-05-14 16:44:45 +0000
commit86d72782c7e64f2c4def98fea15243ddf61ea6a7 (patch)
tree47f194b5b09e3cf63e2e37c66e9f32ea1d1b1a4a
parent4bdd6438f83e5c07cc34ecacbb0508b40b319a31 (diff)
downloadcoreboot-86d72782c7e64f2c4def98fea15243ddf61ea6a7.tar.xz
Fix i945 ACPI for ASL Optimizing Compiler version 20100428.
The values are overwritten on the fly but without the patch iasl will refuse to compile the code. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5550 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r--src/northbridge/intel/i945/acpi/i945_hostbridge.asl22
1 files changed, 11 insertions, 11 deletions
diff --git a/src/northbridge/intel/i945/acpi/i945_hostbridge.asl b/src/northbridge/intel/i945/acpi/i945_hostbridge.asl
index 554adc0367..a76d8e2df9 100644
--- a/src/northbridge/intel/i945/acpi/i945_hostbridge.asl
+++ b/src/northbridge/intel/i945/acpi/i945_hostbridge.asl
@@ -207,17 +207,17 @@ Method (_CRS, 0, Serialized)
0x00000000, 0x000f0000, 0x000fffff, 0x00000000,
0x00010000,,, FSEG)
- // PCI Memory Region (Top of memory-0xfebfffff)
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
- Cacheable, ReadWrite,
- 0x00000000, 0x00000000, 0xfebfffff, 0x00000000,
- 0x00000000,,, PM01)
-
- // TPM Area (0xfed40000-0xfed44fff)
- DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
- Cacheable, ReadWrite,
- 0x00000000, 0xfed40000, 0xfed44fff, 0x00000000,
- 0x00000000,,, TPMR)
+ // PCI Memory Region (Top of memory-0xfebfffff)
+ DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
+ Cacheable, ReadWrite,
+ 0x00000000, 0x00000000, 0xfebfffff, 0x00000000,
+ 0xfec00000,,, PM01)
+
+ // TPM Area (0xfed40000-0xfed44fff)
+ DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
+ Cacheable, ReadWrite,
+ 0x00000000, 0xfed40000, 0xfed44fff, 0x00000000,
+ 0x00005000,,, TPMR)
})
// Find PCI resource area in MCRS