sb/intel/i82801gx: Constify struct southbridge_intel_i82801gx_config

Change-Id: Ia5af84782d41a007be04c3dccc291b788ddfddfd
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40773
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

5 files changed, 7 insertions, 15 deletions

diff --git a/src/southbridge/intel/i82801gx/azalia.c b/src/southbridge/intel/i82801gx/azalia.c
index 205fb0dbf4..91f58570a8 100644
--- a/src/southbridge/intel/i82801gx/azalia.c
+++ b/src/southbridge/intel/i82801gx/azalia.c
@@ -15,8 +15,6 @@
 #define HDA_ICII_BUSY (1 << 0)
 #define HDA_ICII_VALID (1 << 1)
 
-typedef struct southbridge_intel_i82801gx_config config_t;
-
 static int set_bits(void *port, u32 mask, u32 val)
 {
 	u32 reg32;
diff --git a/src/southbridge/intel/i82801gx/ide.c b/src/southbridge/intel/i82801gx/ide.c
index 7fb489dc2c..83d24320dd 100644
--- a/src/southbridge/intel/i82801gx/ide.c
+++ b/src/southbridge/intel/i82801gx/ide.c
@@ -8,8 +8,6 @@
 #include "chip.h"
 #include "i82801gx.h"
 
-typedef struct southbridge_intel_i82801gx_config config_t;
-
 static void ide_init(struct device *dev)
 {
 	u16 ideTimingConfig;
@@ -17,7 +15,7 @@ static void ide_init(struct device *dev)
 	u32 enable_primary, enable_secondary;
 
 	/* Get the chip configuration */
-	config_t *config = dev->chip_info;
+	const struct southbridge_intel_i82801gx_config *config = dev->chip_info;
 
 	printk(BIOS_DEBUG, "i82801gx_ide: initializing...");
 	if (config == NULL) {
diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c
index 901c97c279..88c5633ffb 100644
--- a/src/southbridge/intel/i82801gx/lpc.c
+++ b/src/southbridge/intel/i82801gx/lpc.c
@@ -27,8 +27,6 @@
 
 #define NMI_OFF	0
 
-typedef struct southbridge_intel_i82801gx_config config_t;
-
 /**
  * Set miscellaneous static southbridge features.
  *
@@ -79,7 +77,7 @@ static void i82801gx_pirq_init(struct device *dev)
 {
 	struct device *irq_dev;
 	/* Get the chip configuration */
-	config_t *config = dev->chip_info;
+	const struct southbridge_intel_i82801gx_config *config = dev->chip_info;
 
 	pci_write_config8(dev, PIRQA_ROUT, config->pirqa_routing);
 	pci_write_config8(dev, PIRQB_ROUT, config->pirqb_routing);
@@ -124,7 +122,7 @@ static void i82801gx_pirq_init(struct device *dev)
 static void i82801gx_gpi_routing(struct device *dev)
 {
 	/* Get the chip configuration */
-	config_t *config = dev->chip_info;
+	const struct southbridge_intel_i82801gx_config *config = dev->chip_info;
 	u32 reg32 = 0;
 
 	/* An array would be much nicer here, or some other method of doing this. */
@@ -155,7 +153,7 @@ static void i82801gx_power_options(struct device *dev)
 	u32 reg32;
 	const char *state;
 	/* Get the chip configuration */
-	config_t *config = dev->chip_info;
+	const struct southbridge_intel_i82801gx_config *config = dev->chip_info;
 
 	int pwr_on = CONFIG_MAINBOARD_POWER_FAILURE_STATE;
 	int nmi_option;
@@ -422,7 +420,7 @@ unsigned long acpi_fill_madt(unsigned long current)
 void acpi_fill_fadt(acpi_fadt_t *fadt)
 {
 	struct device *dev = pcidev_on_root(0x1f, 0);
-	config_t *chip = dev->chip_info;
+	const struct southbridge_intel_i82801gx_config *chip = dev->chip_info;
 	u16 pmbase = lpc_get_pmbase();
 
 	fadt->pm1a_evt_blk = pmbase;
diff --git a/src/southbridge/intel/i82801gx/pcie.c b/src/southbridge/intel/i82801gx/pcie.c
index adf0e491b5..dcad32250d 100644
--- a/src/southbridge/intel/i82801gx/pcie.c
+++ b/src/southbridge/intel/i82801gx/pcie.c
@@ -166,7 +166,7 @@ static void root_port_commit_config(struct device *dev)
 	int coalesce = 0;
 
 	if (dev->chip_info != NULL) {
-		struct southbridge_intel_i82801gx_config *config = dev->chip_info;
+		const struct southbridge_intel_i82801gx_config *config = dev->chip_info;
 		coalesce = config->pcie_port_coalesce;
 	}
 
diff --git a/src/southbridge/intel/i82801gx/sata.c b/src/southbridge/intel/i82801gx/sata.c
index c98a645db7..6efdef76cb 100644
--- a/src/southbridge/intel/i82801gx/sata.c
+++ b/src/southbridge/intel/i82801gx/sata.c
@@ -9,8 +9,6 @@
 #include "i82801gx.h"
 #include "sata.h"
 
-typedef struct southbridge_intel_i82801gx_config config_t;
-
 static u8 get_ich7_sata_ports(void)
 {
 	struct device *lpc;
@@ -77,7 +75,7 @@ static void sata_init(struct device *dev)
 	u8 ports;
 
 	/* Get the chip configuration */
-	config_t *config = dev->chip_info;
+	const struct southbridge_intel_i82801gx_config *config = dev->chip_info;
 
 	printk(BIOS_DEBUG, "i82801gx_sata: initializing...\n");