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authorAaron Durbin <adurbin@chromium.org>2016-07-18 11:31:53 -0500
committerAaron Durbin <adurbin@chromium.org>2016-07-19 20:18:47 +0200
commit98ea6367704b3d657c1753f63dc8dfc8d572c99e (patch)
tree4c24bd7200025b490b3086cf6e676eda6dc7b212
parentf0ec82450b86112d8e95b38d91d58f9afdbbb846 (diff)
downloadcoreboot-98ea6367704b3d657c1753f63dc8dfc8d572c99e.tar.xz
drivers/intel/fsp2_0: don't use saved memory data in recovery mode
If the system is in recovery mode force a full retrain. BUG=chrome-os-partner:52679 Change-Id: I4e87685600880d815fe3198b820a10aa269baf37 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/15745 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Andrey Petrov <andrey.petrov@intel.com>
-rw-r--r--src/drivers/intel/fsp2_0/memory_init.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c
index 5168a79bb4..70c920e321 100644
--- a/src/drivers/intel/fsp2_0/memory_init.c
+++ b/src/drivers/intel/fsp2_0/memory_init.c
@@ -14,6 +14,7 @@
#include <arch/io.h>
#include <arch/cpu.h>
#include <arch/symbols.h>
+#include <bootmode.h>
#include <cbfs.h>
#include <cbmem.h>
#include <console/console.h>
@@ -107,6 +108,12 @@ static void fsp_fill_mrc_cache(struct FSPM_ARCH_UPD *arch_upd, bool s3wake,
if (!IS_ENABLED(CONFIG_CACHE_MRC_SETTINGS))
return;
+ /* Don't use saved training data when recovery mode is enabled. */
+ if (recovery_mode_enabled()) {
+ printk(BIOS_DEBUG, "Recovery mode. Not using MRC cache.\n");
+ return;
+ }
+
if (mrc_cache_get_current_with_version(&mrc_cache, fsp_version)) {
printk(BIOS_DEBUG, "MRC cache was not found\n");
return;