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authorAaron Durbin <adurbin@chromium.org>2016-03-08 11:20:53 -0600
committerAaron Durbin <adurbin@chromium.org>2016-03-09 16:47:11 +0100
commit9b28f0023cc6bf71d500132f8cdf5b0a7193a580 (patch)
tree9c7b7c1b95e5f0b387a6f43c26bb904b83aa1268
parent40672becaa44a0d71f6a312335cc4c028d60199b (diff)
downloadcoreboot-9b28f0023cc6bf71d500132f8cdf5b0a7193a580.tar.xz
drivers/intel/fsp2_0: add TODOs to fix deficiencies
The FSP 2.0 implementation doesn't handle FSP modules for SoCs that are required to be XIP. There is no notion of "loading" in that situation where one should be copying anything anywhere. Additionally, the loading code does not handle overlaps within the current running program which is doing the loading. Change-Id: Ide145581f1dd84efb73a28ae51b3313183fa127a Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/13959 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Andrey Petrov <andrey.petrov@intel.com>
-rw-r--r--src/drivers/intel/fsp2_0/util.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/drivers/intel/fsp2_0/util.c b/src/drivers/intel/fsp2_0/util.c
index da8aa9c271..a234a7c12a 100644
--- a/src/drivers/intel/fsp2_0/util.c
+++ b/src/drivers/intel/fsp2_0/util.c
@@ -78,6 +78,7 @@ void fsp_print_header_info(const struct fsp_header *hdr)
}
+/* TODO: this won't work for SoC's that need to XIP certain modules. */
enum cb_err fsp_load_binary(struct fsp_header *hdr,
const char *name,
struct range_entry *range)
@@ -118,6 +119,7 @@ enum cb_err fsp_load_binary(struct fsp_header *hdr,
}
/* Check if the binary load address is within expected range */
+ /* TODO: this doesn't check the current running program footprint. */
if (range_entry_base(range) > hdr->image_base ||
range_entry_end(range) <= hdr->image_base + hdr->image_size) {
printk(BIOS_ERR, "%s is outside of allowed range\n", name);