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authorIru Cai <mytbk920423@gmail.com>2021-05-18 23:56:39 +0800
committerIru Cai <mytbk920423@gmail.com>2021-05-21 20:30:32 +0800
commita37cbb5896bd268393fb843812c5e39930e0dcc4 (patch)
tree48f6339eda4b92093a2a17f4faff215a17bba3ed
parentd0683acb0ce411f13fc1a21fb911422de3e903bf (diff)
downloadcoreboot-a37cbb5896bd268393fb843812c5e39930e0dcc4.tar.xz
print out gbe
-rw-r--r--src/soc/intel/broadwell/refcode/Makefile.inc1
-rw-r--r--src/soc/intel/broadwell/refcode/broadwell_refcode.asm9
-rw-r--r--src/soc/intel/broadwell/refcode/print_gbe.c15
3 files changed, 23 insertions, 2 deletions
diff --git a/src/soc/intel/broadwell/refcode/Makefile.inc b/src/soc/intel/broadwell/refcode/Makefile.inc
index 74bd08dfcd..e90e53b6de 100644
--- a/src/soc/intel/broadwell/refcode/Makefile.inc
+++ b/src/soc/intel/broadwell/refcode/Makefile.inc
@@ -1,4 +1,5 @@
ramstage-libs += $(obj)/broadwell_refcode.o
+ramstage-y += print_gbe.c
$(obj)/%.o: $(src)/soc/intel/broadwell/refcode/%.asm
echo "NASM $@"
diff --git a/src/soc/intel/broadwell/refcode/broadwell_refcode.asm b/src/soc/intel/broadwell/refcode/broadwell_refcode.asm
index 2ca802859d..e86b57388f 100644
--- a/src/soc/intel/broadwell/refcode/broadwell_refcode.asm
+++ b/src/soc/intel/broadwell/refcode/broadwell_refcode.asm
@@ -4,6 +4,8 @@
bits 32
global refcode_entry
+extern print_gbe
+global PchIsGbeRegionValid
refcode_entry:
pushad
@@ -21075,6 +21077,9 @@ pop ebp
ret
fcn_0000cf01:
+push dword [esp+4]
+call print_gbe
+add esp,4
push ebp
mov ebp, esp
push edi
@@ -21089,7 +21094,7 @@ call fcn_00017d8b ; call 0x17d8b
mov esi, eax
pop eax
push dword [ebx + 4]
-call fcn_0001be90 ; call 0x1be90
+call PchIsGbeRegionValid ; call 0x1be90
movzx edx, byte [ebx + 0x37e]
add esp, 0x10
mov edi, eax
@@ -46811,7 +46816,7 @@ mov ebx, dword [ebp - 4]
leave
jmp near fcn_00017e4e ; jmp 0x17e4e
-fcn_0001be90:
+PchIsGbeRegionValid:
push ebp
mov ebp, esp
push ebx
diff --git a/src/soc/intel/broadwell/refcode/print_gbe.c b/src/soc/intel/broadwell/refcode/print_gbe.c
new file mode 100644
index 0000000000..e9021628b9
--- /dev/null
+++ b/src/soc/intel/broadwell/refcode/print_gbe.c
@@ -0,0 +1,15 @@
+#include <console/console.h>
+#include <stdint.h>
+
+void print_gbe(void *refcode_ppi);
+int PchIsGbeRegionValid(uint32_t rcba);
+
+void print_gbe(void *refcode_ppi)
+{
+ int enable_gbe = *(char*)(refcode_ppi + 0x37e);
+ uint32_t rcba = *(uint32_t*)(refcode_ppi + 4);
+
+ printk(BIOS_DEBUG, "enable_gbe = %d\n"
+ "gbe_region_valid = %d\n",
+ enable_gbe, PchIsGbeRegionValid(rcba));
+}