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| author | Angel Pons <th3fanbus@gmail.com> | 2021-03-28 14:06:55 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2021-04-05 13:02:27 +0000 |
| commit | a60b42a26abd720d81db35578d54c77c799d67cb (patch) | |
| tree | 7bcfe3b4a2ba1253d64e260874cc502c7abdb5ae | |
| parent | 6c6e0492829771a63c5c175d5c7f431fc7447442 (diff) | |
| download | coreboot-a60b42a26abd720d81db35578d54c77c799d67cb.tar.xz | |
nb/intel/i945: Refactor `dump_spd_registers` function
Use the mainboard-provided SPD map and skip unused addresses.
Change-Id: I2b5b71cff290343c1000d5613209049fa9724e3d
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51899
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
| -rw-r--r-- | src/northbridge/intel/i945/debug.c | 11 | ||||
| -rw-r--r-- | src/northbridge/intel/i945/i945.h | 2 | ||||
| -rw-r--r-- | src/northbridge/intel/i945/romstage.c | 6 |
3 files changed, 10 insertions, 9 deletions
diff --git a/src/northbridge/intel/i945/debug.c b/src/northbridge/intel/i945/debug.c index db987cae8b..6073f59eed 100644 --- a/src/northbridge/intel/i945/debug.c +++ b/src/northbridge/intel/i945/debug.c @@ -57,11 +57,13 @@ void dump_pci_devices(void) } } -void dump_spd_registers(void) +void dump_spd_registers(u8 spd_map[4]) { - unsigned int device; - device = DIMM0; - while (device <= DIMM3) { + for (unsigned int d = 0; d < 4; d++) { + const unsigned int device = spd_map[d]; + if (device == 0) + continue; + int status = 0; int i; printk(BIOS_DEBUG, "\ndimm %02x", device); @@ -76,7 +78,6 @@ void dump_spd_registers(void) } printk(BIOS_DEBUG, "%02x ", status); } - device++; printk(BIOS_DEBUG, "\n"); } } diff --git a/src/northbridge/intel/i945/i945.h b/src/northbridge/intel/i945/i945.h index fe06afc8ec..d8993acdf0 100644 --- a/src/northbridge/intel/i945/i945.h +++ b/src/northbridge/intel/i945/i945.h @@ -337,7 +337,7 @@ void i945_late_initialization(int s3resume); void print_pci_devices(void); void dump_pci_device(unsigned int dev); void dump_pci_devices(void); -void dump_spd_registers(void); +void dump_spd_registers(u8 spd_map[4]); void sdram_dump_mchbar_registers(void); u32 decode_igd_memory_size(u32 gms); diff --git a/src/northbridge/intel/i945/romstage.c b/src/northbridge/intel/i945/romstage.c index 248fe14560..22eae4ef1e 100644 --- a/src/northbridge/intel/i945/romstage.c +++ b/src/northbridge/intel/i945/romstage.c @@ -48,11 +48,11 @@ void mainboard_romstage_entry(void) mainboard_pre_raminit_config(s3resume); - if (CONFIG(DEBUG_RAM_SETUP)) - dump_spd_registers(); - mainboard_get_spd_map(spd_map); + if (CONFIG(DEBUG_RAM_SETUP)) + dump_spd_registers(spd_map); + sdram_initialize(s3resume ? BOOT_PATH_RESUME : BOOT_PATH_NORMAL, spd_map); /* This should probably go away. Until now it is required |