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| author | Greg Watson <jarrah@users.sourceforge.net> | 2003-10-12 21:30:44 +0000 |
|---|---|---|
| committer | Greg Watson <jarrah@users.sourceforge.net> | 2003-10-12 21:30:44 +0000 |
| commit | abf9faa786c34b29b1703d45f7ffc10f4403544e (patch) | |
| tree | 1eca59eb0ca6f31cc58c9e51a5ae853f14e5f5cb | |
| parent | 85862124fd6b069f21b4dbfd6bd7dade740ae82f (diff) | |
| download | coreboot-abf9faa786c34b29b1703d45f7ffc10f4403544e.tar.xz | |
*** empty log message ***
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1209 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
| -rw-r--r-- | src/mainboard/embeddedplanet/ep405pc/Config.lb | 7 | ||||
| -rw-r--r-- | targets/motorola/sandpoint/Config.lb | 2 |
2 files changed, 9 insertions, 0 deletions
diff --git a/src/mainboard/embeddedplanet/ep405pc/Config.lb b/src/mainboard/embeddedplanet/ep405pc/Config.lb index 8387123e3e..021bb25b15 100644 --- a/src/mainboard/embeddedplanet/ep405pc/Config.lb +++ b/src/mainboard/embeddedplanet/ep405pc/Config.lb @@ -6,8 +6,15 @@ uses PCIC0_CFGADDR uses PCIC0_CFGDATA uses UART0_IO_BASE +## +## Set PCI registers +## option PCIC0_CFGADDR=0xeec00000 option PCIC0_CFGDATA=0xeec00004 + +## +## Set UART base address +## option UART0_IO_BASE=0xef600300 arch ppc end diff --git a/targets/motorola/sandpoint/Config.lb b/targets/motorola/sandpoint/Config.lb index 03fa3c1704..433d6518de 100644 --- a/targets/motorola/sandpoint/Config.lb +++ b/targets/motorola/sandpoint/Config.lb @@ -14,6 +14,7 @@ uses DEFAULT_CONSOLE_LOGLEVEL uses CONFIG_CHIP_CONFIGURE uses NO_POST uses CONFIG_CONSOLE_SERIAL8250 +uses TTYS0_BASE uses CONFIG_IDE_STREAM uses IDE_BOOT_DRIVE uses IDE_SWAB IDE_OFFSET @@ -46,6 +47,7 @@ option NO_POST=1 ## Enable serial console option DEFAULT_CONSOLE_LOGLEVEL=8 option CONFIG_CONSOLE_SERIAL8250=1 +option TTYS0_BASE=0xfe000000 ## Boot linux from IDE option CONFIG_IDE_STREAM=1 |