lib: Make log2() available in romstage on ARM, not just x86

On x86, log2() is defined as an inline function in arch/io.h. This is
a remnant of ROMCC, and forced us to not include clog2.c in romstage.
As a result, romstage on ARM has no log2().
Use the inline log2 only with ROMCC, but otherwise, use the one in
clog2.c.

Change-Id: Ifef2aa0a7b5a1db071a66f2eec0be421b8b2a56d
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/4681
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>

7 files changed, 11 insertions, 2 deletions

diff --git a/src/arch/x86/include/arch/io.h b/src/arch/x86/include/arch/io.h
index 955d8e2f91..b10fb8a7cf 100644
--- a/src/arch/x86/include/arch/io.h
+++ b/src/arch/x86/include/arch/io.h
@@ -167,7 +167,8 @@ static inline __attribute__((always_inline)) void write32(unsigned long addr, ui
 	*((volatile uint32_t *)(addr)) = value;
 }
 
-#if defined(__PRE_RAM__) || defined(__SMM__)
+/* Conflicts with definition in lib.h */
+#if defined(__ROMCC__) || defined(__SMM__)
 static inline int log2(int value)
 {
         unsigned int r = 0;
@@ -180,6 +181,9 @@ static inline int log2(int value)
         return r;
 
 }
+#endif
+
+#if defined(__PRE_RAM__) || defined(__SMM__)
 static inline int log2f(int value)
 {
         unsigned int r = 0;
diff --git a/src/include/lib.h b/src/include/lib.h
index 5fc390a4a0..3a515332b1 100644
--- a/src/include/lib.h
+++ b/src/include/lib.h
@@ -23,7 +23,7 @@
 #define __LIB_H__
 #include <stdint.h>
 
-#ifndef __PRE_RAM__ /* Conflicts with inline function in arch/io.h */
+#if !defined(__ROMCC__) /* Conflicts with inline function in arch/io.h */
 /* Defined in src/lib/clog2.c */
 unsigned long log2(unsigned long x);
 #endif
diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc
index b09dace649..37c7dea2ec 100644
--- a/src/lib/Makefile.inc
+++ b/src/lib/Makefile.inc
@@ -88,6 +88,7 @@ ramstage-y += lzma.c
 ramstage-y += stack.c
 ramstage-$(CONFIG_ARCH_X86) += gcc.c
 ramstage-y += clog2.c
+romstage-y += clog2.c
 ramstage-$(CONFIG_CONSOLE_SERIAL8250) += uart8250.c
 ramstage-$(CONFIG_CONSOLE_SERIAL8250MEM) += uart8250mem.c
 ramstage-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c
diff --git a/src/northbridge/amd/amdk8/incoherent_ht.c b/src/northbridge/amd/amdk8/incoherent_ht.c
index 6cbe7dc765..c1509f06c2 100644
--- a/src/northbridge/amd/amdk8/incoherent_ht.c
+++ b/src/northbridge/amd/amdk8/incoherent_ht.c
@@ -6,6 +6,7 @@
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
 #include <device/hypertransport_def.h>
+#include <lib.h>
 
 // Do we need allocate MMIO? Current We direct last 64M to sblink only, We can not lose access to last 4M range to ROM
 #ifndef K8_ALLOCATE_MMIO_RANGE
diff --git a/src/northbridge/intel/e7505/raminit.c b/src/northbridge/intel/e7505/raminit.c
index 3d4dfe2624..455f3ab5e4 100644
--- a/src/northbridge/intel/e7505/raminit.c
+++ b/src/northbridge/intel/e7505/raminit.c
@@ -16,6 +16,7 @@
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <arch/cpu.h>
+#include <lib.h>
 #include <stdlib.h>
 #include <console/console.h>
 
diff --git a/src/northbridge/intel/i3100/raminit.c b/src/northbridge/intel/i3100/raminit.c
index 0292496749..e83feaa414 100644
--- a/src/northbridge/intel/i3100/raminit.c
+++ b/src/northbridge/intel/i3100/raminit.c
@@ -22,6 +22,7 @@
 #include <cpu/x86/mtrr.h>
 #include <cpu/x86/cache.h>
 #include <cpu/intel/speedstep.h>
+#include <lib.h>
 #include <stdlib.h>
 #include "raminit.h"
 #include "i3100.h"
diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c
index 512d8e9260..046f5f8e3d 100644
--- a/src/northbridge/intel/i945/raminit.c
+++ b/src/northbridge/intel/i945/raminit.c
@@ -24,6 +24,7 @@
 #include <spd.h>
 #include <string.h>
 #include <arch/io.h>
+#include <lib.h>
 #include "raminit.h"
 #include "i945.h"
 #include <cbmem.h>