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authorJeremy Soller <jeremy@system76.com>2020-07-20 15:19:30 -0600
committerMichael Niewöhner <foss@mniewoehner.de>2020-09-17 21:37:11 +0000
commitb349f258a99d4e56e875b7dbf86fa2368d196a41 (patch)
tree3e30390c31cc05c9bfc88dba44e3a1edc50a0c99
parentd7775b763f8a68737e8543e84db9f2d0b23726b1 (diff)
downloadcoreboot-b349f258a99d4e56e875b7dbf86fa2368d196a41.tar.xz
mb/system76/lemp9: update power limits
Tested on lemp9, power limits are adjusted from the previously low values to the values the thermal system can handle. This was determined by increasing the values and running the system at 100% CPU utilization until thermal throttling occured and the chassis temperature became uncomfortable. Signed-off-by: Jeremy Soller <jeremy@system76.com> Change-Id: I5e176e9d98376f8e2dc415e4397efc456869e72d Reviewed-on: https://review.coreboot.org/c/coreboot/+/43624 Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/mainboard/system76/lemp9/devicetree.cb4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/system76/lemp9/devicetree.cb b/src/mainboard/system76/lemp9/devicetree.cb
index 1b11033346..e7e68e8587 100644
--- a/src/mainboard/system76/lemp9/devicetree.cb
+++ b/src/mainboard/system76/lemp9/devicetree.cb
@@ -25,8 +25,8 @@ chip soc/intel/cannonlake
# CPU (soc/intel/cannonlake/cpu.c)
# Power limit
register "power_limits_config" = "{
- .tdp_pl1_override = 15,
- .tdp_pl2_override = 25,
+ .tdp_pl1_override = 20,
+ .tdp_pl2_override = 30,
}"
# Enable "Intel Speed Shift Technology"