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| author | Michael Niewöhner <foss@mniewoehner.de> | 2019-09-19 17:02:28 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2020-03-18 18:09:56 +0000 |
| commit | b6b8575c0ae97f0b34a2ea08f0b3e7bdf3b805bc (patch) | |
| tree | 19d9316d23424d26a61908c3b5ae048fe9e1c969 | |
| parent | 7eeaeeecc590d22a8f51175ba07cf2cfade19bfc (diff) | |
| download | coreboot-b6b8575c0ae97f0b34a2ea08f0b3e7bdf3b805bc.tar.xz | |
util/inteltool: powermgt: make Sunrise Point dumping work
The existing Sunrise Point ids are assigned to the wrong implementation,
which would never work for these chipsets. Assign them to the right
dumping implementation, which works for both Sunrise Point PCH-H and
PCH-LP.
This also adds some missing device ids from doc#332691-003EN and
doc#334659-005.
Change-Id: Id102ef3809d675dc9a915d2cb3062e093487fa27
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39508
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
| -rw-r--r-- | util/inteltool/powermgt.c | 36 |
1 files changed, 23 insertions, 13 deletions
diff --git a/util/inteltool/powermgt.c b/util/inteltool/powermgt.c index 3f489b88fa..70f8c48f0d 100644 --- a/util/inteltool/powermgt.c +++ b/util/inteltool/powermgt.c @@ -745,16 +745,6 @@ int print_pmbase(struct pci_dev *sb, struct pci_access *pacc) case PCI_DEVICE_ID_INTEL_C224: case PCI_DEVICE_ID_INTEL_C226: case PCI_DEVICE_ID_INTEL_H81: - case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_PRE: - case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_BASE_SKL: - case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_Y_PREM_SKL: - case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_PREM_SKL: - case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_BASE_KBL: - case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_PREM_KBL: - case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_Y_PREM_KBL: - case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_IHDCP_BASE: - case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_IHDCP_PREM: - case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_Y_IHDCP_PREM: pmbase = pci_read_word(sb, 0x40) & 0xff80; pm_registers = pch_pm_registers; pm_registers_size = ARRAY_SIZE(pch_pm_registers); @@ -828,15 +818,35 @@ int print_pmbase(struct pci_dev *sb, struct pci_access *pacc) pm_registers = i82371xx_pm_registers; pm_registers_size = ARRAY_SIZE(i82371xx_pm_registers); break; - case PCI_DEVICE_ID_INTEL_I63XX: pmbase = pci_read_word(sb, 0x40) & 0xfffc; pm_registers = i63xx_pm_registers; pm_registers_size = ARRAY_SIZE(i63xx_pm_registers); break; - - case PCI_DEVICE_ID_INTEL_CM236: + case PCI_DEVICE_ID_INTEL_H110: + case PCI_DEVICE_ID_INTEL_H170: + case PCI_DEVICE_ID_INTEL_Z170: + case PCI_DEVICE_ID_INTEL_Q170: + case PCI_DEVICE_ID_INTEL_Q150: + case PCI_DEVICE_ID_INTEL_B150: case PCI_DEVICE_ID_INTEL_C236: + case PCI_DEVICE_ID_INTEL_C232: + case PCI_DEVICE_ID_INTEL_QM170: + case PCI_DEVICE_ID_INTEL_HM170: + case PCI_DEVICE_ID_INTEL_CM236: + case PCI_DEVICE_ID_INTEL_HM175: + case PCI_DEVICE_ID_INTEL_QM175: + case PCI_DEVICE_ID_INTEL_CM238: + case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_PRE: + case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_BASE_SKL: + case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_Y_PREM_SKL: + case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_PREM_SKL: + case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_BASE_KBL: + case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_PREM_KBL: + case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_Y_PREM_KBL: + case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_IHDCP_BASE: + case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_IHDCP_PREM: + case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_Y_IHDCP_PREM: case PCI_DEVICE_ID_INTEL_CANNONPOINT_LP_U_PREM: acpi = pci_get_dev(pacc, sb->domain, sb->bus, sb->dev, 2); if (!acpi) { |