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authorStefan Reinauer <reinauer@chromium.org>2012-06-21 16:05:21 -0700
committerPatrick Georgi <patrick@georgi-clan.de>2012-07-24 12:26:26 +0200
commitbaae2d2761bee15e80f37e8e8ee400c7504a987c (patch)
tree5b87758da5f4a1870ca26a0710426cfd2e867c46
parentb5dfcae09728d38d8049e348a2b7654087b3a734 (diff)
downloadcoreboot-baae2d2761bee15e80f37e8e8ee400c7504a987c.tar.xz
Add support for HM70 and NM70 LPC bridge
This lets the SPI driver and the LPC driver know about HM70 and NM70. Change-Id: Id2f1e0e5586a2f7200b2d24785df3f2be890da98 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/1300 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
-rw-r--r--src/include/device/pci_ids.h2
-rw-r--r--src/northbridge/intel/sandybridge/report_platform.c15
-rw-r--r--src/southbridge/intel/bd82x6x/lpc.c10
3 files changed, 20 insertions, 7 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index fd886dafe1..7aac1f7076 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -2507,7 +2507,7 @@
#define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MIN 0x1c41
#define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MAX 0x1c5f
#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MIN 0x1e41
-#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MAX 0x1e5d
+#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MAX 0x1e5f
#define PCI_DEVICE_ID_INTEL_TGP_LPC 0x27bc
/* Intel 82801E (C-ICH) */
diff --git a/src/northbridge/intel/sandybridge/report_platform.c b/src/northbridge/intel/sandybridge/report_platform.c
index bc88a8970f..ecd8f18dee 100644
--- a/src/northbridge/intel/sandybridge/report_platform.c
+++ b/src/northbridge/intel/sandybridge/report_platform.c
@@ -66,21 +66,24 @@ static struct {
const char *dev_name;
} pch_table [] = {
{0x1E41, "Desktop Sample"},
+ {0x1E42, "Mobile Sample"},
+ {0x1E43, "SFF Sample"},
+ {0x1E44, "Z77"},
+ {0x1E45, "H71"},
+ {0x1E46, "Z75"},
{0x1E47, "Q77"},
{0x1E48, "Q75"},
{0x1E49, "B75"},
- {0x1E44, "Z77"},
- {0x1E46, "Z75"},
{0x1E4A, "H77"},
{0x1E53, "C216"},
- {0x1E42, "Mobile Sample"},
{0x1E55, "QM77"},
+ {0x1E56, "QS77"},
{0x1E58, "UM77"},
{0x1E57, "HM77"},
{0x1E59, "HM76"},
- {0x1E5d, "HM75"},
- {0x1E43, "SFF Sample"},
- {0x1E56, "QS77"},
+ {0x1E5D, "HM75"},
+ {0x1E5E, "HM70"},
+ {0x1E5F, "NM70"},
};
static void report_pch_info(void)
diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c
index dddab6a2a2..703fc8aa92 100644
--- a/src/southbridge/intel/bd82x6x/lpc.c
+++ b/src/southbridge/intel/bd82x6x/lpc.c
@@ -684,3 +684,13 @@ static const struct pci_driver hm75_lpc __pci_driver = {
.vendor = PCI_VENDOR_ID_INTEL,
.device = 0x1e5d,
};
+static const struct pci_driver hm70_lpc __pci_driver = {
+ .ops = &device_ops,
+ .vendor = PCI_VENDOR_ID_INTEL,
+ .device = 0x1e5e,
+};
+static const struct pci_driver nm70_lpc __pci_driver = {
+ .ops = &device_ops,
+ .vendor = PCI_VENDOR_ID_INTEL,
+ .device = 0x1e5f,
+};