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| author | Frank Vibrans <frank.vibrans@amd.com> | 2011-05-05 16:45:36 +0000 |
|---|---|---|
| committer | Marc Jones <marc.jones@amd.com> | 2011-05-05 16:45:36 +0000 |
| commit | ec40260ade7f9d03978f3a15b5c4e8343d3e6065 (patch) | |
| tree | 5abee0f352ada1576bfbc50d35cf8813a39891f4 | |
| parent | 2f81c03d3a0d3183061ca56aecc306995dd648f2 (diff) | |
| download | coreboot-ec40260ade7f9d03978f3a15b5c4e8343d3e6065.tar.xz | |
Remove AMD Agesa requirement for standard include files
This change modifies Makefile.inc to add the -nostdinc flag to the default
CFLAGS value and removes the test for non-AMD Agesa builds. Other code is
added to the gcc-intrin.h file in the Agesa Include folder to make the
requirement for the standard includes obsolete from the Agesa perspective.
Signed-off-by: Frank Vibrans <frank.vibrans@amd.com>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6555 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
| -rw-r--r-- | Makefile.inc | 5 | ||||
| -rw-r--r-- | src/vendorcode/amd/agesa/Include/gcc-intrin.h | 19 |
2 files changed, 17 insertions, 7 deletions
diff --git a/Makefile.inc b/Makefile.inc index 6267539884..ea27dd11fd 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -106,16 +106,13 @@ INCLUDES += -Isrc/devices/oprom/include # abspath is a workaround for romcc INCLUDES += -include $(abspath $(obj)/config.h) -CFLAGS = $(INCLUDES) -Os -pipe -g +CFLAGS = $(INCLUDES) -Os -pipe -g -nostdinc CFLAGS += -nostdlib -Wall -Wundef -Wstrict-prototypes -Wmissing-prototypes CFLAGS += -Wwrite-strings -Wredundant-decls -Wno-trigraphs CFLAGS += -Wstrict-aliasing -Wshadow ifeq ($(CONFIG_WARNINGS_ARE_ERRORS),y) CFLAGS += -Werror endif -ifneq ($(CONFIG_AMD_AGESA),y) -CFLAGS += -nostdinc -endif CFLAGS += -fno-common -ffreestanding -fno-builtin -fomit-frame-pointer additional-dirs := $(objutil)/cbfstool $(objutil)/romcc $(objutil)/options diff --git a/src/vendorcode/amd/agesa/Include/gcc-intrin.h b/src/vendorcode/amd/agesa/Include/gcc-intrin.h index 26bb46154b..bacd83c1d6 100644 --- a/src/vendorcode/amd/agesa/Include/gcc-intrin.h +++ b/src/vendorcode/amd/agesa/Include/gcc-intrin.h @@ -27,8 +27,6 @@ */ #if defined (__GNUC__) -#include <pmmintrin.h> - /* I/O intrin functions. */ static __inline__ __attribute__((always_inline)) unsigned char __inbyte(unsigned short Port) @@ -558,6 +556,10 @@ static __inline__ __attribute__((always_inline)) unsigned long long __readfsdwor return value; } +#ifdef __SSE3__ +typedef long long __v2di __attribute__ ((__vector_size__ (16))); +typedef long long __m128i __attribute__ ((__vector_size__ (16), __may_alias__)); + static __inline__ __attribute__((always_inline)) void _mm_stream_si128_fs2 (void *__A, __m128i __B) { __asm__(".byte 0x64"); // fs prefix @@ -567,9 +569,10 @@ static __inline__ __attribute__((always_inline)) void _mm_stream_si128_fs2 (void static __inline__ __attribute__((always_inline)) void _mm_stream_si128_fs (void *__A, void *__B) { __m128i data; - data = _mm_lddqu_si128 (__B); + data = (__m128i) __builtin_ia32_lddqu ((char const *)__B); _mm_stream_si128_fs2 (__A, data); } +#endif static __inline__ __attribute__((always_inline)) void _mm_clflush_fs (void *__A) { @@ -577,6 +580,16 @@ static __inline__ __attribute__((always_inline)) void _mm_clflush_fs (void *__A) __builtin_ia32_clflush (__A); } +static __inline __attribute__(( __always_inline__)) void _mm_mfence (void) +{ + __builtin_ia32_mfence (); +} + +static __inline __attribute__(( __always_inline__)) void _mm_sfence (void) +{ + __builtin_ia32_sfence (); +} + static __inline__ __attribute__((always_inline)) void __stosb(unsigned char *dest, unsigned char data, size_t count) { __asm__ __volatile__ ( |