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authorNico Huber <nico.h@gmx.de>2020-05-20 01:02:18 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-05-26 15:14:21 +0000
commitf531244d20998091bd8c311a4183de0bcc9f6ff2 (patch)
tree776d05c247f9fad5c6d603525fc2a22b92b69690
parent730b2616aa3c24d6ee9da5cf00ba7f0248776cbd (diff)
downloadcoreboot-f531244d20998091bd8c311a4183de0bcc9f6ff2.tar.xz
device/pci: Handle unassigned bus resources gracefully
The I/O windows of PCI bridges can be disabled individually by setting their limit lower than their base. Always do this if a resource wasn't assigned a value. Change-Id: I73f6817c4b12cb1689627044735d1fed6d825afe Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41552 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Furquan Shaikh <furquan@google.com>
-rw-r--r--src/device/pci_device.c14
1 files changed, 10 insertions, 4 deletions
diff --git a/src/device/pci_device.c b/src/device/pci_device.c
index 9011f0da4b..e6c6ff31a4 100644
--- a/src/device/pci_device.c
+++ b/src/device/pci_device.c
@@ -510,10 +510,16 @@ static void pci_set_resource(struct device *dev, struct resource *resource)
{
/* Make certain the resource has actually been assigned a value. */
if (!(resource->flags & IORESOURCE_ASSIGNED)) {
- printk(BIOS_ERR, "ERROR: %s %02lx %s size: 0x%010llx not "
- "assigned\n", dev_path(dev), resource->index,
- resource_type(resource), resource->size);
- return;
+ if (resource->flags & IORESOURCE_BRIDGE) {
+ /* If a bridge resource has no value assigned,
+ we can treat it like an empty resource. */
+ resource->size = 0;
+ } else {
+ printk(BIOS_ERR, "ERROR: %s %02lx %s size: 0x%010llx not "
+ "assigned\n", dev_path(dev), resource->index,
+ resource_type(resource), resource->size);
+ return;
+ }
}
/* If this resource is fixed don't worry about it. */