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authorMichael Niewöhner <foss@mniewoehner.de>2020-12-21 03:46:58 +0100
committerMichael Niewöhner <foss@mniewoehner.de>2021-01-21 18:50:11 +0000
commitf6d320060d4ab96fbe383cb9fd01fa43a8e022b7 (patch)
tree179eb594363e3b2e5d432175d5cfac0bd8122a85
parent3840bcc19e28401e5fd4e3b4c0f0d1438fbbdeed (diff)
downloadcoreboot-f6d320060d4ab96fbe383cb9fd01fa43a8e022b7.tar.xz
mb/intel/minnow3: do UART pad configuration at board-level
UART pad configuration should not be done in common code, because that may cause short circuits, when the user sets a wrong UART index. Thus, add the corresponding pads to the early UART gpio table for the board as a first step. Common UART pad config code then gets dropped in CB:48829. Also switch to `bootblock_mainboard_early_init` to configure the pads in early bootblock before console initialization, to make the console work as early as possible. The board does not do any other gpio configuration in bootblock, so this should not influence behaviour in a negative way (e.g. breaking overrides). Change-Id: I0b956427a9cec56d06b03f7f05138f75137b4ea3 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49437 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/mainboard/intel/minnow3/bootblock.c5
-rw-r--r--src/mainboard/intel/minnow3/gpio.c3
2 files changed, 6 insertions, 2 deletions
diff --git a/src/mainboard/intel/minnow3/bootblock.c b/src/mainboard/intel/minnow3/bootblock.c
index ceb530b0a3..e2a339138f 100644
--- a/src/mainboard/intel/minnow3/bootblock.c
+++ b/src/mainboard/intel/minnow3/bootblock.c
@@ -1,14 +1,15 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <bootblock_common.h>
+#include <soc/gpio.h>
+
#include "gpio.h"
-void bootblock_mainboard_init(void)
+void bootblock_mainboard_early_init(void)
{
const struct pad_config *pads;
size_t num;
- /* Configure GPIOs needed prior to ramstage. */
pads = early_gpio_table(&num);
gpio_configure_pads(pads, num);
}
diff --git a/src/mainboard/intel/minnow3/gpio.c b/src/mainboard/intel/minnow3/gpio.c
index 2e356d60c2..4c0515d8e9 100644
--- a/src/mainboard/intel/minnow3/gpio.c
+++ b/src/mainboard/intel/minnow3/gpio.c
@@ -279,6 +279,9 @@ const struct pad_config *gpio_table(size_t *num)
/* GPIOs needed prior to ramstage. */
static const struct pad_config early_gpio_table_config[] = {
+ PAD_CFG_NF(GPIO_46, UP_20K, DEEP, NF1), /* LPSS_UART2_RXD */
+ PAD_CFG_NF(GPIO_47, UP_20K, DEEP, NF1), /* LPSS_UART2_TXD */
+
PAD_CFG_NF(GPIO_134, UP_20K, DEEP, NF2), /* ISH_I2C0_SDA/IO-OD */
PAD_CFG_NF(GPIO_135, UP_20K, DEEP, NF2), /* ISH_I2C0_SCL/IO-OD */
PAD_CFG_NF(GPIO_136, UP_20K, DEEP, NF2), /* ISH_I2C1_SDA/IO-OD */